A low voltage low power operational transconductance amplifier (OTA) based on a bulk driven cell and its application to implement a tunable Gm-C filter is presented. The linearity of the OTA is improved by attenuation...A low voltage low power operational transconductance amplifier (OTA) based on a bulk driven cell and its application to implement a tunable Gm-C filter is presented. The linearity of the OTA is improved by attenuation and source degeneration techniques. The attenuation technique is implemented by bulk driven cell which is used for low supply voltage circuits. The OTA is designed to operate with a 0.9 V supply voltage and consumes 58.8 μW power. A 600 mVppd sine wave input signal at 1 MHz frequency shows total harmonic distortion (THD) better than -40 dB over the tuning range of the transconductance. The OTA has been used to realize a tunable Gm-C low-pass filter with gain tuning from 5 dB to 21 dB with 4 dB gain steps, which results in power consumptions of 411.6 to 646.8 μW. This low voltage filter can operate as channel select filter and variable gain amplifier (VGA) for wireless sensor network (WSN) applications. The proposed OTA and filter have been simulated in 0.18 μm CMOS technology. Corner case and temperature simulation results are also included to forecast process and temperature variation affects after fabrication.展开更多
We propose a modeling methodology for both leakage power consumption and delay of basic CMOS digital gates in the presence of threshold voltage and mobility variations. The key parameters in determining the leakage an...We propose a modeling methodology for both leakage power consumption and delay of basic CMOS digital gates in the presence of threshold voltage and mobility variations. The key parameters in determining the leakage and delay are OFF and ON currents, respectively, which are both affected by the variation of the threshold voltage. Additionally, the current is a strong function of mobility. The proposed methodology relies on a proper modeling of the threshold voltage and mobility variations, which may be induced by any source. Using this model, in the plane of threshold voltage and mobility, we determine regions for different combinations of performance (speed) and leakage. Based on these regions, we discuss the trade-off between leakage and delay where the leakage-delay-product is the optimization objective. To assess the accuracy of the proposed model, we compare its predictions with those of HSPICE simulations for both basic digital gates and ISCAS85 benchmark circuits in 45-, 65-, and 90-nm technologies.展开更多
文摘A low voltage low power operational transconductance amplifier (OTA) based on a bulk driven cell and its application to implement a tunable Gm-C filter is presented. The linearity of the OTA is improved by attenuation and source degeneration techniques. The attenuation technique is implemented by bulk driven cell which is used for low supply voltage circuits. The OTA is designed to operate with a 0.9 V supply voltage and consumes 58.8 μW power. A 600 mVppd sine wave input signal at 1 MHz frequency shows total harmonic distortion (THD) better than -40 dB over the tuning range of the transconductance. The OTA has been used to realize a tunable Gm-C low-pass filter with gain tuning from 5 dB to 21 dB with 4 dB gain steps, which results in power consumptions of 411.6 to 646.8 μW. This low voltage filter can operate as channel select filter and variable gain amplifier (VGA) for wireless sensor network (WSN) applications. The proposed OTA and filter have been simulated in 0.18 μm CMOS technology. Corner case and temperature simulation results are also included to forecast process and temperature variation affects after fabrication.
文摘We propose a modeling methodology for both leakage power consumption and delay of basic CMOS digital gates in the presence of threshold voltage and mobility variations. The key parameters in determining the leakage and delay are OFF and ON currents, respectively, which are both affected by the variation of the threshold voltage. Additionally, the current is a strong function of mobility. The proposed methodology relies on a proper modeling of the threshold voltage and mobility variations, which may be induced by any source. Using this model, in the plane of threshold voltage and mobility, we determine regions for different combinations of performance (speed) and leakage. Based on these regions, we discuss the trade-off between leakage and delay where the leakage-delay-product is the optimization objective. To assess the accuracy of the proposed model, we compare its predictions with those of HSPICE simulations for both basic digital gates and ISCAS85 benchmark circuits in 45-, 65-, and 90-nm technologies.
