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Observations of the step-like accelerating processes of cold ions in the reconnection layer at the dayside magnetopause 被引量:2
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作者 Qinghe zhang Michael Lockwood +5 位作者 John C.Foster Qiugang Zong Malcolm W.Dunlop Shunrong zhang Joran Moen beichen zhang 《Science Bulletin》 SCIE EI CSCD 2018年第1期31-37,共7页
Cold ions of plasmaspheric origin have been observed to abundantly appear in the magnetospheric side of the Earth's magnetopause. These cold ions could affect the magnetic reconnection processes at the magnetopaus... Cold ions of plasmaspheric origin have been observed to abundantly appear in the magnetospheric side of the Earth's magnetopause. These cold ions could affect the magnetic reconnection processes at the magnetopause by changing the Alfvén velocity and the reconnection rate, while they could also be heated in the reconnection layer during the ongoing reconnections. We report in situ observations from a partially crossing of a reconnection layer near the subsolar magnetopause. During this crossing, step-like accelerating processes of the cold ions were clearly observed, suggesting that the inflow cold ions may be separately accelerated by the rotation discontinuity and slow shock inside the reconnection layer. 展开更多
关键词 Cold ions Magnetic reconnection Ion accelerations MAGNETOPAUSE
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High power-efficient asynchronous SAR ADC for IoT devices 被引量:1
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作者 beichen zhang Bingbing Yao +2 位作者 Liyuan Liu Jian Liu Nanjian Wu 《Journal of Semiconductors》 EI CAS CSCD 2017年第10期2-8,共7页
This paper presents a power-efficient 100-MS/s,10-bit asynchronous successive approximation register(SAR) ADC.It includes an on-chip reference buffer and the total power dissipation is 6.8 mW.To achieve high perform... This paper presents a power-efficient 100-MS/s,10-bit asynchronous successive approximation register(SAR) ADC.It includes an on-chip reference buffer and the total power dissipation is 6.8 mW.To achieve high performance with high power-efficiency in the proposed ADC,bootstrapped switch,redundancy,set-and-down switching approach,dynamic comparator and dynamic logic techniques are employed.The prototype was fabricated using 65 nm standard CMOS technology.At a 1.2-V supply and 100 MS/s,the ADC achieves an SNDR of 56.2 dB and a SFDR of 65.1 dB.The ADC core consumes only 3.1 mW,resulting in a figure of merit(FOM) of 30.27 fJ/conversionstep and occupies an active area of only 0.009 mm^2. 展开更多
关键词 SAR ADC ASYNCHRONOUS bootstrapped switch dynamic logic power efficiency
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