We investigate the leakage current of ultra-shallow Ni-silicided SiGe/Si junctions for 45 nm CMOS technology using a Si cap layer and the pre-amorphization implantation (PAI) process.It is found that with the conventi...We investigate the leakage current of ultra-shallow Ni-silicided SiGe/Si junctions for 45 nm CMOS technology using a Si cap layer and the pre-amorphization implantation (PAI) process.It is found that with the conventional Ni silicide method,the leakage current of a p+ (SiGe)-n(Si) junction is large and attributed to band-to-band tunneling and the generation-recombination process. The two leakage contributors can be suppressed quite effectively when a Si cap layer is added in the Ni silicide method.The leakage reduction is about one order of magnitude and could be associated with the suppression of the agglomeration of the Ni germano-silicide film.In addition,the PAI process after the application of a Si cap layer has little effect on improving the junction leakage but reduces the sheet resistance of the silicide film.As a result,the novel Ni silicide method using a Si cap combined with PAI is a promising choice for SiGe junctions in advanced technology.展开更多
As the scaling-down of non-volatile memory （NVM） cells continues, the impact of shallow trench isolation （STI） on NVM cells becomes more severe. It has been observed in the 90nm localized charge-trapping non-volat...As the scaling-down of non-volatile memory （NVM） cells continues, the impact of shallow trench isolation （STI） on NVM cells becomes more severe. It has been observed in the 90nm localized charge-trapping non-volatile memory （NROMTM） that the programming efficiency of edge cells adjacent to STI is remarkably lower than that of other cells when channel hot electron injection is applied. Boron segregation is found to be mainly responsible for the low programming efficiency of edge cells. Meanwhile, an additional boron implantation of 10°tilt at the active area edge as a new solution to solve this problem is developed.展开更多
基金Supported by the National Basic Research Program of China under Grant Nos 2010CB934200 and 2012CB619200the National Key Project(2009ZX-02023)the Natural Science Foundation of Jiangsu Province(No BK2011011).
文摘We investigate the leakage current of ultra-shallow Ni-silicided SiGe/Si junctions for 45 nm CMOS technology using a Si cap layer and the pre-amorphization implantation (PAI) process.It is found that with the conventional Ni silicide method,the leakage current of a p+ (SiGe)-n(Si) junction is large and attributed to band-to-band tunneling and the generation-recombination process. The two leakage contributors can be suppressed quite effectively when a Si cap layer is added in the Ni silicide method.The leakage reduction is about one order of magnitude and could be associated with the suppression of the agglomeration of the Ni germano-silicide film.In addition,the PAI process after the application of a Si cap layer has little effect on improving the junction leakage but reduces the sheet resistance of the silicide film.As a result,the novel Ni silicide method using a Si cap combined with PAI is a promising choice for SiGe junctions in advanced technology.
文摘As the scaling-down of non-volatile memory （NVM） cells continues, the impact of shallow trench isolation （STI） on NVM cells becomes more severe. It has been observed in the 90nm localized charge-trapping non-volatile memory （NROMTM） that the programming efficiency of edge cells adjacent to STI is remarkably lower than that of other cells when channel hot electron injection is applied. Boron segregation is found to be mainly responsible for the low programming efficiency of edge cells. Meanwhile, an additional boron implantation of 10°tilt at the active area edge as a new solution to solve this problem is developed.
