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基于二维半导体的人工神经网络芯片 被引量:1
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作者 马顺利 吴天祥 +17 位作者 陈新宇 王印 唐宏伟 姚玉婷 王言 朱子阳 邓嘉男 万景 陆叶 孙正宗 许子寒 刘安 吴晨健 张卫 柴扬 周鹏 任俊彦 包文中 《Science Bulletin》 SCIE EI CSCD 2022年第3期270-277,共8页
近些年,二维半导体由于其独特的原子层厚度和可调控带隙等优势受到学术和产业界越来越多的关注。本文基于晶團级二维硫化钼(MoS_(2))进行了大规模电路应用尝试,成功制备了世界上第一个集乘加单元(MAC)、存储单元和激活函数电路于一体的... 近些年,二维半导体由于其独特的原子层厚度和可调控带隙等优势受到学术和产业界越来越多的关注。本文基于晶團级二维硫化钼(MoS_(2))进行了大规模电路应用尝试,成功制备了世界上第一个集乘加单元(MAC)、存储单元和激活函数电路于一体的功能性MoS:人工神经网络(ANN)芯片该芯片的制备采用了与硅基工艺更为兼容的顶栅晶体管结构,在1片晶圓级MoS_(2)薄膜上集成了818个MoS_(2)晶体管,并成功演示了基于ANN电路的触觉感知识别应用.该研究不仅展示了二维半导体在大规模集成电路中应用潜力,而且探索了二维半导体在人工智能芯片中的应用。 展开更多
关键词 存储单元 人工智能 激活函数 二维半导体 大规模集成电路 触觉感知 硫化钼
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Top gate engineering of field-effect transistors based on wafer-scale two-dimensional semiconductors
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作者 Jingyi Ma Xinyu Chen +15 位作者 Yaochen Sheng Ling Tong Xiaojiao Guo Minxing Zhang Chen Luo Lingyi Zong Yin Xia Chuming Sheng Yin Wang Saifei Gou Xinyu Wang Xing wu Peng Zhou David Wei Zhang chenjian wu Wenzhong Bao 《Journal of Materials Science & Technology》 SCIE EI CAS CSCD 2022年第11期243-248,共6页
The investigation of two-dimensional(2D)materials has advanced into practical device applications,such as cascaded logic stages.However,incompatible electrical properties and inappropriate logic levels remain enormous... The investigation of two-dimensional(2D)materials has advanced into practical device applications,such as cascaded logic stages.However,incompatible electrical properties and inappropriate logic levels remain enormous challenges.In this work,a doping-free strategy is investigated by top gated(TG)MoS_(2) field-effect transistors(FETs)using various metal gates(Au,Cu,Ag,and Al).These metals with different work functions provide a convenient tuning knob for controlling threshold voltage(V_(th))for MoS_(2) FETs.For instance,the Al electrode can create an extra electron doping(n-doping)behavior in the MoS_(2) TG-FETs due to a dipole effect at the gate-dielectric interface.In this work,by achieving matched electrical properties for the load transistor and the driver transistor in an inverter circuit,we successfully demonstrate wafer-scale MoS_(2) inverter arrays with an optimized inverter switching threshold voltage(V_(M))of 1.5 V and a DC voltage gain of 27 at a supply voltage(V_(DD))of 3 V.This work offers a novel scheme for the fabrication of fully integrated multistage logic circuits based on wafer-scale MoS_(2) film. 展开更多
关键词 Two-dimensional semiconductor MoS_(2) Top gate Field effect transistor Logic inverter
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