A 4×112 Gb/s hybrid-integrated optical receiver is demonstrated based on the silicon-photonic vertical p-i-n photodetector and silicon–germanium transimpedance amplifier.We propose a photonic-electronic co-desig...A 4×112 Gb/s hybrid-integrated optical receiver is demonstrated based on the silicon-photonic vertical p-i-n photodetector and silicon–germanium transimpedance amplifier.We propose a photonic-electronic co-design technique to optimize both the device-level and system-level performance,based on the end-to-end equivalent circuit model of the receiver.Continuous-time linear equalization and shunt peaking are employed to enhance the frequency response.Experimental results reveal that the optical-to-electrical 3-dB bandwidth of the receiver is 48 GHz.Clear open NRZ eye diagrams at56 Gb/s and PAM-4 eye diagrams at 112 Gb/s are achieved without an equalizer in the oscilloscope.The measured bit error rates for 56 Gb/s in NRZ and 112 Gb/s in PAM-4 reach 1×10^(-12)and 2.4×10^(-4)(KP4-FEC:forward error correction)thresholds under-4 dBm input power,respectively.Furthermore,the proposed receiver boasts a power consumption of approximately2.2 pJ/bit,indicating an energy efficient solution for data center traffic growth.展开更多
基金supported in part by the National Natural Science Foundation of China(NSFC)(Nos.62235017 and 62235015)the Young Elite Scientist Sponsorship Program(No.YESS20220688)the National Key Research and Development Program of China(No.2020YFB2205700)。
文摘A 4×112 Gb/s hybrid-integrated optical receiver is demonstrated based on the silicon-photonic vertical p-i-n photodetector and silicon–germanium transimpedance amplifier.We propose a photonic-electronic co-design technique to optimize both the device-level and system-level performance,based on the end-to-end equivalent circuit model of the receiver.Continuous-time linear equalization and shunt peaking are employed to enhance the frequency response.Experimental results reveal that the optical-to-electrical 3-dB bandwidth of the receiver is 48 GHz.Clear open NRZ eye diagrams at56 Gb/s and PAM-4 eye diagrams at 112 Gb/s are achieved without an equalizer in the oscilloscope.The measured bit error rates for 56 Gb/s in NRZ and 112 Gb/s in PAM-4 reach 1×10^(-12)and 2.4×10^(-4)(KP4-FEC:forward error correction)thresholds under-4 dBm input power,respectively.Furthermore,the proposed receiver boasts a power consumption of approximately2.2 pJ/bit,indicating an energy efficient solution for data center traffic growth.
