A Ka-band sub-harmonically pumped resistive mixer(SHPRM) was designed and fabricated using the standard 0.18-μm complementary metal-oxide-semiconductor(CMOS) technology.An area-effective asymmetric broadside coupled ...A Ka-band sub-harmonically pumped resistive mixer(SHPRM) was designed and fabricated using the standard 0.18-μm complementary metal-oxide-semiconductor(CMOS) technology.An area-effective asymmetric broadside coupled spiral Marchand balance-to-unbalance(balun) with magnitude and phase imbalance compensation is used in the mixer to transform local oscillation(LO) signal from single to differential mode.The results showed that the SHPRM achieves the conversion gain of-15--12.5 dB at fixed fIF=0.5 GHz with 8 dBm LO input power for the radio frequency(RF) bandwidth of 28-35 GHz.The in-band LO-intermediate freqency(IF),RF-IF,and LO-RF isolations are better than 31,34,and 36 dB,respectively.Besides,the 2LO-IF and 2LO-RF isolations are better than 60 and 45 dB,respectively.The measured input referred P1dB and 3rd-order inter-modulation intercept point(IIP3) are 0.5 and 10.5 dBm,respectively.The measurement is performed under a gate bias voltage as low as 0.1 V and the whole chip only occupies an area of 0.33 mm2 including pads.展开更多
We present a 31–45.5 GHz injection-locked frequency divider(ILFD) implemented in a standard 90-nm CMOS process. To reduce parasitic capacitance and increase the operating frequency, an NMOS-only cross-coupled pair is...We present a 31–45.5 GHz injection-locked frequency divider(ILFD) implemented in a standard 90-nm CMOS process. To reduce parasitic capacitance and increase the operating frequency, an NMOS-only cross-coupled pair is adopted to provide negative resistance. Acting as an adjustable resistor, an NMOS transistor with a tunable gate bias voltage is connected to the differential output terminals for locking range extension. Measurements show that the designed ILFD can be fully functional in a wide locking range and provides a good figure-of-merit. Under a 1 V tunable bias voltage, the self-resonant frequency of the divider is 19.11 GHz and the maximum locking range is 37.7% at 38.5 GHz with an input power of 0 d Bm. The power consumption is 2.88 m W under a supply voltage of 1.2 V. The size of the chip including the pads is 0.62 mm×0.42 mm.展开更多
基金Project supported by the National Basic Research Program (973) of China (No. 2010CB327404)the National High-Tech R&D Program (863) of China (No. 2011AA10305)the National Natural Science Foundation of China (No. 60901012)
文摘A Ka-band sub-harmonically pumped resistive mixer(SHPRM) was designed and fabricated using the standard 0.18-μm complementary metal-oxide-semiconductor(CMOS) technology.An area-effective asymmetric broadside coupled spiral Marchand balance-to-unbalance(balun) with magnitude and phase imbalance compensation is used in the mixer to transform local oscillation(LO) signal from single to differential mode.The results showed that the SHPRM achieves the conversion gain of-15--12.5 dB at fixed fIF=0.5 GHz with 8 dBm LO input power for the radio frequency(RF) bandwidth of 28-35 GHz.The in-band LO-intermediate freqency(IF),RF-IF,and LO-RF isolations are better than 31,34,and 36 dB,respectively.Besides,the 2LO-IF and 2LO-RF isolations are better than 60 and 45 dB,respectively.The measured input referred P1dB and 3rd-order inter-modulation intercept point(IIP3) are 0.5 and 10.5 dBm,respectively.The measurement is performed under a gate bias voltage as low as 0.1 V and the whole chip only occupies an area of 0.33 mm2 including pads.
基金Project supported by the National Basic Research Program(973)of China(No.2010CB327404)the National High-Tech R&D Program(863)of China(No.2011AA10305)the National Natural Science Foundation of China(Nos.60901012 and 61106024)
文摘We present a 31–45.5 GHz injection-locked frequency divider(ILFD) implemented in a standard 90-nm CMOS process. To reduce parasitic capacitance and increase the operating frequency, an NMOS-only cross-coupled pair is adopted to provide negative resistance. Acting as an adjustable resistor, an NMOS transistor with a tunable gate bias voltage is connected to the differential output terminals for locking range extension. Measurements show that the designed ILFD can be fully functional in a wide locking range and provides a good figure-of-merit. Under a 1 V tunable bias voltage, the self-resonant frequency of the divider is 19.11 GHz and the maximum locking range is 37.7% at 38.5 GHz with an input power of 0 d Bm. The power consumption is 2.88 m W under a supply voltage of 1.2 V. The size of the chip including the pads is 0.62 mm×0.42 mm.
