In the pursuit for scalable quantum processors,significanteffort has been devoted to the development of cryogenic classical hardware for the control and readout of a growingnumber of qubits.The current work presented ...In the pursuit for scalable quantum processors,significanteffort has been devoted to the development of cryogenic classical hardware for the control and readout of a growingnumber of qubits.The current work presented a novelapproach called impedancemetry that is suitable for measuringthe quantum capacitance of semiconductor qubits connected toa resonant LC-circuit.The impedancemetry circuit exploits theintegration of a complementary metal-oxide-semiconductor(CMOS)active inductor in the resonator with tunable resonance frequency and quality factor,enabling the optimizationof readout sensitivity for quantum devices.The realized cryogenic circuit allows fast impedance detection with a measuredcapacitance resolution down to 10 aF and an input-referrednoise of 3.7 aF/Hz p.At 4.2 K,the power consumption of theactive inductor amounts to 120μW,with an additional dissipation for on-chip current excitation(0.15μW)and voltageamplification(2.9 mW)of the impedance measurement.Compared to the commonly used schemes based on dispersiveRF reflectometry which require millimeter-scale passive inductors,the circuit exhibits a notably reduced footprint(50μm360μm),facilitating its integration in a scalable quantumclassical architecture.The impedancemetry method has been applied at 4.2 K to the detection of quantum effects in the gatecapacitance of on-chip nanometric CMOS transistors that areindividually addressed via multiplexing.展开更多
基金supported by the EuropeanUnion’s Horizon 2020 Research and Innovation program under GrantAgreement No.810504(ERC Synergy project QuCube).
文摘In the pursuit for scalable quantum processors,significanteffort has been devoted to the development of cryogenic classical hardware for the control and readout of a growingnumber of qubits.The current work presented a novelapproach called impedancemetry that is suitable for measuringthe quantum capacitance of semiconductor qubits connected toa resonant LC-circuit.The impedancemetry circuit exploits theintegration of a complementary metal-oxide-semiconductor(CMOS)active inductor in the resonator with tunable resonance frequency and quality factor,enabling the optimizationof readout sensitivity for quantum devices.The realized cryogenic circuit allows fast impedance detection with a measuredcapacitance resolution down to 10 aF and an input-referrednoise of 3.7 aF/Hz p.At 4.2 K,the power consumption of theactive inductor amounts to 120μW,with an additional dissipation for on-chip current excitation(0.15μW)and voltageamplification(2.9 mW)of the impedance measurement.Compared to the commonly used schemes based on dispersiveRF reflectometry which require millimeter-scale passive inductors,the circuit exhibits a notably reduced footprint(50μm360μm),facilitating its integration in a scalable quantumclassical architecture.The impedancemetry method has been applied at 4.2 K to the detection of quantum effects in the gatecapacitance of on-chip nanometric CMOS transistors that areindividually addressed via multiplexing.
