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Phonon Limited Electron Mobility in Germanium FinFETs:Fin Direction Dependence
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作者 Ying Jing gen-quan han +2 位作者 Yan Liu Jin-Cheng Zhang Yue Hao 《Chinese Physics Letters》 SCIE CAS CSCD 2019年第2期54-58,共5页
We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are sol... We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are solved self-consistently to calculate the electronic structures for the two-dimensional electron gas, and Fermi's golden rule is used to calculate the phonon scattering rate. It is concluded that the intra-valley acoustic phonon scattering is the dominant mechanism limiting the electron mobility in Ge FinFETs. The phonon limited electron motilities are influenced by wafer orientation, channel direction, in thickness Wfin, and inversion charge density Ninv. With the fixed Wfin, fin directions of(110),(112) and(110) within(001),(110), and(111)-oriented wafers provide the maximum values of electron mobility. The optimized for mobility is also dependent on wafer orientation and channel direction. As Ninv, increases, phonon limited mobility degrades, which is attributed to electron repopulation from a higher mobility valley to a lower mobility valley as Ninv increases. 展开更多
关键词 PHONON LIMITED Electron Mobility FIN Direction DEPENDENCE
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Ohmic Contact at Al/TiO_2/n-Ge Interface with TiO_2 Deposited at Extremely Low Temperature
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作者 Yi Zhang Huan Liu +3 位作者 gen-quan han Yan Liu Jin-Cheng Zhang Yue Hao 《Chinese Physics Letters》 SCIE CAS CSCD 2018年第2期116-119,共4页
TiO2deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmiss... TiO2deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeOxto reduce the tunneling resistance. Compared with TiO2deposited at higher temperature of 250°C,there are more oxygen vacancies in lower-temperature-deposited TiO2, which will dope TiO2contributing to the lower tunneling resistance. Al/TiO2/n-Ge metal-insulator-semiconductor diodes with 2 nm 120°C deposited TiO2achieves 2496 times of current density at-0.1 V compared with the device without the TiO2interface layer case, and is 8.85 times larger than that with 250°C deposited TiO2. Thus inserting extremely low temperature deposited TiO2to depin the Fermi level for n-Ge may be a better choice. 展开更多
关键词 TIO Ohmic Contact at Al/TiO2/n-Ge Interface with TiO2 Deposited at Extremely Low Temperature Ge Al
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