4–λ hybrid InGaAsP-Si evanescent laser array with low power consumption for on-chip optical interconnects

A 4 –λ hybrid InGaAsP-Si evanescent laser array is obtained by bonding III–V distributed feedback lasers to a silicon on insulator(SOI) substrate using a selective area metal bonding technique. Multiple wavelengths are realized by varying the width of the III–V ridge waveguide. The threshold current is less than 10 mA for all wavelength channels under continuous-wave(CW) operation at room temperature, and the lowest threshold current density is 0.76 kA∕cm2. The side mode suppression ratio(SMSR) is higher than 40 dB for all wavelength channels when the injection current is between 20 mA and 70 mA at room temperature, and the highest SMSR is up to 51 dB. A characteristic temperature of 51 K and thermal impedance of 144°C/W are achieved on average.The 4 –λ hybrid InGaAsP-Si evanescent laser array exhibits a low threshold and high SMSR under CW operation at room temperature. The low power consumption of this device makes it very attractive for on-chip optical interconnects.

On-chip silicon light source： from photonics to plasmonics

Practical silicon photonic interconnects become possible nowadays after the realization of the practical silicon light sources, where the hybrid integrations of III-V semiconductors and silicon by bonding play a fundamental role. Photonic interconnects dissipate substantially less power and offer a significantly greater information bandwidth than those of electronic interconnects; however, one emerging problem is the size mismatch between photonic and electronic components when integrated on a chip. Therefore, surface plasmonic source with deeply sub-wavelength size is under intense investigation as the next generation Si-based light source for on-chip interconnects. In this paper, we shall review some of the latest achievements on this topic.