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Computationally efficient locality-aware interconnection topology for multi-processor system-on-chip(MP-SoC) 被引量:3
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作者 haroon-ur-rashid khan 《Chinese Science Bulletin》 SCIE EI CAS 2010年第29期3363-3371,共9页
This paper evaluates the Triplet Based Architecture,TriBA-a new idea in chip multiprocessor architectures and a class of Direct Interconnection Network(DIN).TriBA consists of a 2D grid of small,programmable processing... This paper evaluates the Triplet Based Architecture,TriBA-a new idea in chip multiprocessor architectures and a class of Direct Interconnection Network(DIN).TriBA consists of a 2D grid of small,programmable processing units,each physically connected to its three neighbors so that advantageous features of group locality can be fully and efficiently utilized.Any communication model can be well characterized by locality properties and,any topology has its intrinsic,structural,locality characteristics.We propose a new criterion in performance evaluation that is based on the concept of locality in an interconnection network,the "lower layer complete connect".Our proposed criterion depicts how completely a processing node is connected to all its neighbors.TriBA is compared with 2D Mesh and Binary Tree as static interconnection network.The comparison/evaluation is enumerated from three orthogonal view points,viz.,computational speed,physical layout and cost.Our analysis concludes that TriBA is computationally efficient interconnection strategy that exploits group locality in processing nodes. 展开更多
关键词 互连网络 系统级芯片 拓扑结构 多处理器 计算效率 局部性 SOC MP
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