An Intelligent Forwarding Strategy in SDN-Enabled Named-Data IoV

Internet of Vehicles(IoV),a rapidly growing technology for efficient vehicular communication and it is shifting the trend of traditional Vehicular Ad Hoc Networking(VANET)towards itself.The centralized management of IoV endorses its uniqueness and suitability for the Intelligent Transportation System(ITS)safety applications.Named Data Networking(NDN)is an emerging internet paradigm that fulfills most of the expectations of IoV.Limitations of the current IP internet architecture are the main motivation behind NDN.Software-Defined Networking(SDN)is another emerging networking paradigm of technology that is highly capable of efficient management of overall networks and transforming complex networking architectures into simple and manageable ones.The combination of the SDN controller,NDN,and IoV can be revolutionary in the overall performance of the network.Broadcast storm,due to the broadcasting nature of NDN,is a critical issue in NDN based on IoV.High speed and rapidly changing topology of vehicles in IoV creates disconnected link problem and add unnecessary transmission delay.In order to cop-up with the above-discussed problems,we proposed an efficient SDN-enabled forwarding mechanism in NDN-based IoV,which supports the mobility of the vehicle and explores the cellular network for the low latency control messages.In IoV environment,the concept of Edge Controller(EC)to maintain and manage the in-time and real-time vehicular topology is being introduced.A mathematical estimation model is also proposed in our work that assists the centralized EC and SDN to find not only the shortest and best path but also the most reliable and durable path.The naming scheme and in-network caching property of the NDN nodes reduce the delay.We used ndnSIM and NS-3 for the simulation experiment along with SUMO for the environment generation.The results of NDSDoV illustrate significant performance in terms of availability with limited routing overhead,minimized delay,retransmissions,and increased packet satisfaction ratio.Besides,we explored the properties of EC that contribute mainly in path failure minimization in the network.

Flexible Global Aggregation and Dynamic Client Selection for Federated Learning in Internet of Vehicles

Federated Learning(FL)enables collaborative and privacy-preserving training of machine learning models within the Internet of Vehicles(IoV)realm.While FL effectively tackles privacy concerns,it also imposes significant resource requirements.In traditional FL,trained models are transmitted to a central server for global aggregation,typically in the cloud.This approach often leads to network congestion and bandwidth limitations when numerous devices communicate with the same server.The need for Flexible Global Aggregation and Dynamic Client Selection in FL for the IoV arises from the inherent characteristics of IoV environments.These include diverse and distributed data sources,varying data quality,and limited communication resources.By employing dynamic client selection,we can prioritize relevant and high-quality data sources,enhancing model accuracy.To address this issue,we propose an FL framework that selects global aggregation nodes dynamically rather than a single fixed aggregator.Flexible global aggregation ensures efficient utilization of limited network resources while accommodating the dynamic nature of IoV data sources.This approach optimizes both model performance and resource allocation,making FL in IoV more effective and adaptable.The selection of the global aggregation node is based on workload and communication speed considerations.Additionally,our framework overcomes the constraints associated with network,computational,and energy resources in the IoV environment by implementing a client selection algorithm that dynamically adjusts participants according to predefined parameters.Our approach surpasses Federated Averaging(FedAvg)and Hierarchical FL(HFL)regarding energy consumption,delay,and accuracy,yielding superior results.

Energy-Efficient Scheduling Based on Task Migration Policy Using DPM for Homogeneous MPSoCs

Increasing the life span and efficiency of Multiprocessor System on Chip(MPSoC)by reducing power and energy utilization has become a critical chip design challenge for multiprocessor systems.With the advancement of technology,the performance management of central processing unit(CPU)is changing.Power densities and thermal effects are quickly increasing in multi-core embedded technologies due to shrinking of chip size.When energy consumption reaches a threshold that creates a delay in complementary metal oxide semiconductor(CMOS)circuits and reduces the speed by 10%–15%because excessive on-chip temperature shortens the chip’s life cycle.In this paper,we address the scheduling&energy utilization problem by introducing and evaluating an optimal energy-aware earliest deadline first scheduling(EA-EDF)based technique formultiprocessor environments with task migration that enhances the performance and efficiency in multiprocessor systemon-chip while lowering energy and power consumption.The selection of core andmigration of tasks prevents the system from reaching itsmaximumenergy utilization while effectively using the dynamic power management(DPM)policy.Increase in the execution of tasks the temperature and utilization factor(u_(i))on-chip increases that dissipate more power.The proposed approach migrates such tasks to the core that produces less heat and consumes less power by distributing the load on other cores to lower the temperature and optimizes the duration of idle and sleep times across multiple CPUs.The performance of the EA-EDF algorithm was evaluated by an extensive set of experiments,where excellent results were reported when compared to other current techniques,the efficacy of the proposed methodology reduces the power and energy consumption by 4.3%–4.7%on a utilization of 6%,36%&46%at 520&624 MHz operating frequency when particularly in comparison to other energy-aware methods for MPSoCs.Tasks are running and accurately scheduled to make an energy-efficient processor by controlling and managing the thermal effects on-chip and optimizing the energy consumption of MPSoCs.

An Optimal DPM Based Energy-Aware Task Scheduling for Performance Enhancement in Embedded MPSoC

Minimizing the energy consumption to increase the life span and performance of multiprocessor system on chip(MPSoC)has become an integral chip design issue for multiprocessor systems.The performance measurement of computational systems is changing with the advancement in technology.Due to shrinking and smaller chip size power densities onchip are increasing rapidly that increasing chip temperature in multi-core embedded technologies.The operating speed of the device decreases when power consumption reaches a threshold that causes a delay in complementary metal oxide semiconductor(CMOS)circuits because high on-chip temperature adversely affects the life span of the chip.In this paper an energy-aware dynamic power management technique based on energy aware earliest deadline first(EA-EDF)scheduling is proposed for improving the performance and reliability by reducing energy and power consumption in the system on chip(SOC).Dynamic power management(DPM)enables MPSOC to reduce power and energy consumption by adopting a suitable core configuration for task migration.Task migration avoids peak temperature values in the multicore system.High utilization factor(ui)on central processing unit(CPU)core consumes more energy and increases the temperature on-chip.Our technique switches the core bymigrating such task to a core that has less temperature and is in a low power state.The proposed EA-EDF scheduling technique migrates load on different cores to attain stability in temperature among multiple cores of the CPU and optimized the duration of the idle and sleep periods to enable the low-temperature core.The effectiveness of the EA-EDF approach reduces the utilization and energy consumption compared to other existing methods and works.The simulation results show the improvement in performance by optimizing 4.8%on u_(i) 9%,16%,23%and 25%at 520 MHz operating frequency as compared to other energy-aware techniques for MPSoCs when the least number of tasks is in running state and can schedule more tasks to make an energy-efficient processor by controlling and managing the energy consumption of MPSoC.