The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing since it affects the post-chemical mechanical polishing (post-CMP) uniformity of the thickness deviation o...The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing since it affects the post-chemical mechanical polishing (post-CMP) uniformity of the thickness deviation of dielectric films. In this study, the nanotopography impact was investigated in terms of its dependence on the characteristics of ceriabased slurries, such as the abrasive size, the grain size of the polycrystalline abrasive and the surfactant added to the slurry. It was found that the magnitude of the post-CMP oxide thickness deviation due to nanotopography increased with the surfactant concentration in the case of smaller abrasives but was almost independent of the concentration in the case of larger abrasives. The grain size of the polycrystalline abrasive did not affect the nanotopography impact.展开更多
文摘The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing since it affects the post-chemical mechanical polishing (post-CMP) uniformity of the thickness deviation of dielectric films. In this study, the nanotopography impact was investigated in terms of its dependence on the characteristics of ceriabased slurries, such as the abrasive size, the grain size of the polycrystalline abrasive and the surfactant added to the slurry. It was found that the magnitude of the post-CMP oxide thickness deviation due to nanotopography increased with the surfactant concentration in the case of smaller abrasives but was almost independent of the concentration in the case of larger abrasives. The grain size of the polycrystalline abrasive did not affect the nanotopography impact.
