A compensation circuit for the gain temperature drift of silicon photomultiplier tube

Background Silicon photomultiplier tube(SiPM)has been widely applied in high energy physics experiments.The wide field of view Cherenkov telescope array of Large High Altitude Air Shower Observatory(LHAASO)consists of 12 arrays of SiPMs.Each of the array includes 32*32 pixels.Large Array of imaging atmospheric Cherenkov Telescopes(LACT),the next generation of particle astrophysics experiment,will also adopt SiPM arrays.Purpose LACT will located at a high altitude,leading to a significant operating temperature variation of the SiPM.Since the gain of SiPM is temperature-sensitive,in order to keep it stable,compensation for the gain is necessary by adjusting the bias voltage of SiPM.Methods The compensation circuit provides the bias voltage of SiPM by using a high-voltage output Digital-to-Analog Converter and several high-voltage output amplifiers.To reduce the temperature drift of the gain,the compensation circuit adjust the bias voltage of SiPM according to the operating temperature.Results The compensation circuit supplies SiPM with an adjustable bias voltage from 0 to 80 V,and the adjustment step is 1.22 mV.When the output voltage of the compensation circuit is 64 V,the voltage ripple is 2.59 mV,and the temperature drift is 0.17 mV/℃.In the temperature range from−20 to 30℃,the compensation circuit reduces the gain temperature drift of SiPM to within 2%.

LHAASO KM2A distributed long-distance data transmission

Background The large high-altitude air shower observatory(LHAASO)is being built near Daocheng(4410 m a.s.l.)in the Sichuan province of China.Its main instrument is the one-kilometer square extensive air shower array(KM2A)which will comprise nearly 7000 detectors.The system adopts a distributed architecture where each detector has local front-end electronics for signal digitization and transmission.White Rabbit(WR)is the communication protocol used within KM2A to reach the required 1-ns synchronization accuracy between detectors.Purpose To provide data transport and synchronization over the same network.Methods We have developed a firmware implementation of the TCP/IP protocol in Verilog hardware description language that can be coupled with a WR intellectual property core.Results LHAASO KM2A distributed data and clock synchronization network meets the high requirement of the array for reliable data transmission and clock synchronization.Conclusion The data transmission method based on the TCP/IP protocol suite and WR can be run in Xilinx Spartan6 FPGA with low resource needs,which greatly expand its application field.