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Enhancement in Light Extraction Efficiency of GaN-Based Light-Emitting Diodes Using Double Dielectric Surface Passivation 被引量:1
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作者 Chung-Mo Yang Dong-Seok Kim +3 位作者 Yun Soo Park Jae-Hoon lee Yong Soo lee jung-hee lee 《Optics and Photonics Journal》 2012年第3期185-192,共8页
SiO2Al2O3 double dielectric stack layer was deposited on the surface of the GaN-based light-emitting diode (LED). The double dielectric stack layer enhances both the electrical characteristics and the optical output p... SiO2Al2O3 double dielectric stack layer was deposited on the surface of the GaN-based light-emitting diode (LED). The double dielectric stack layer enhances both the electrical characteristics and the optical output power of the LED because the first Al2O3 layer plays a role of effectively passivating the p-GaN surface and the second lower index SiO2 layer increases the critical angle of the light emitted from the LED surface. In addition, the effect of the Fresnel reflection is also responsible for the enhancement in output power of the double dielectric passivated LED. The leakage current of the LED passivated with Al2O3 layer was -3.46 × 10-11 A at -5 V, at least two and three orders lower in magnitude compared to that passivated with SiO2 layer (-7.14 × 10-9 A) and that of non-passivated LED (-1.9 × 10-8 A), respectively, which indicates that the Al2O3 layer is very effective in passivating the exposed GaN surface after dry etch and hence reduces nonradiative recombination as well as reabsorption of the emitted light near the etched surface. 展开更多
关键词 GaN LIGHT-EMITTING DIODE (LED) AL2O3 PEALD PASSIVATION DOUBLE Dielectric STACK Layer
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Trap and 1/f-noise effects at the surface and core of GaN nanowire gateall-around FET structure
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作者 Mallem Siva Pratap Reddy Ki-Sik Im +2 位作者 jung-hee lee Raphael Caulmione Sorin Cristoloveanu 《Nano Research》 SCIE EI CAS CSCD 2019年第4期809-814,共6页
Using capacitance,conductance and noise measurements,we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1 D) array of GaN nanowire gate-all-around field effect tr... Using capacitance,conductance and noise measurements,we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1 D) array of GaN nanowire gate-all-around field effect transistor (GAA FET),fabricated via a top-down process.The surface traps in such a low dimensional device play a crucial role in determining the device performance.The estimated surface trap density rapidly decreases with increasing frequency,ranging from 6.07 × 1012 cm-2·eV-1 at 1 kHz to 1.90 × 1011 cm-2·eV-1 at 1 MHz,respectively.The noise results reveal that the power spectral density increases with gate voltage and clearly exhibits 1/f-noise signature in the accumulation region (Vgs > Vth =3.4 V) for all frquencies.In the surface depletion region (1.5 V < Vgs < Vth),the device is governed by 1/fat lower frequencies and 1/f2 noise at frequencies higher than ~ 5 kHz.The 1/f2 noise characteristics is attributed to additional generation-recombination (G-R),mostly caused by the electron trapping/detrapping process through deep traps located in the surface depletion region of the nanowire.The cutoff frequency for the 1/f2 noise characteristics further shifts to lower frequency of 102-103 Hz when the device operates in deep-subthreshold region (Vgs < 1.5 V).In this regime,the electron trapping/detrapping process through deep traps expands into the totally depleted nanowire core and the G-R noise prevails in the entire nanowire channel. 展开更多
关键词 GATE-ALL-AROUND field effect transistor (FET) NANOWIRE GAN TRAP 1/f-noise
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Modeling of subthreshold characteristics for undoped and doped deep nanoscale short channel double-gate MOSFETs
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作者 靳晓诗 刘溪 +3 位作者 吴美乐 揣荣岩 jung-hee lee Jong-Ho lee 《Journal of Semiconductors》 EI CAS CSCD 2012年第12期27-30,共4页
A model of subthreshold characteristics for both undoped and doped double-gate (DG) MOSFETs has been proposed. The models were developed based on solution of 2-D Poisson's equation using variable separa- tion techn... A model of subthreshold characteristics for both undoped and doped double-gate (DG) MOSFETs has been proposed. The models were developed based on solution of 2-D Poisson's equation using variable separa- tion technique. Without any fitting parameters, our proposed models can exactly reflect the degraded subthreshold characteristics due to nanoscale channel length. Also, design parameters such as body thickness, gate oxide thick- ness and body doping concentrations can be directly reflected from our models. The models have been verified by comparing with device simulations' results and found very good agreement. 展开更多
关键词 DOUBLE-GATE MOSFETS deep nanoscale MODELING
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