Local Tuning of the Surface Potential in Silicon Carriers by Ion Beam Induced Intrinsic Defects

The immobilization of biomaterials on a carrier is the first step for many different applications in life science and medicine. The usage of surface-near electrostatic forces is one possible approach to guide the charged biomaterials to a specific location on the carrier. In this study, we investigate the effect of intrinsic defects on the surface potential of silicon carriers in the dark and under illumination by means of Kelvin probe force microscopy. The intrinsic defects were introduced into the carrier by local, stripe-patterned ion implantation of silicon ions with a fluence of 3 × 1013 Si ions/cm2 and 3 × 1015 Si ions/cm2 into a p-type silicon wafer with a dopant concentration of 9 × 1015 B/cm3. The patterned implantation allows a direct comparison between the surface potential of the silicon host against the surface potential of implanted stripes. The depth of the implanted silicon ions in the target and the concentration of displaced silicon atoms was simulated using the Stopping and Range of Ions in Matter (SRIM) software. The low fluence implantation shows a negligible effect on the measured Kelvin bias in the dark, whereas the large fluence implantation leads to an increased Kelvin bias, i.e. to a smaller surface work function according to the contact potential difference model. Illumination causes a reduced surface band bending and surface potential in the non-implanted regions. The change of the Kelvin bias in the implanted regions under illumination provides insight into the mobility and lifetime of photo-generated electron-hole pairs. Finally, the effect of annealing on the intrinsic defect density is discussed and compared with atomic force microscopy measurements on the 2nd harmonic. In addition, by using the Baumgart, Helm, Schmidt interpretation of the measured Kelvin bias, the dopant concentration after implantation is estimated.

Ⅲ-Ⅴ semiconductor nanocrystal formation in silicon nanowires via liquid-phase epitaxy

Direct integration of high-mobility III-V compound semiconductors with existing Si-based complementary metal-oxide-semiconductor （CMOS） processing platforms presents the main challenge to increasing the CMOS performance and the scaling trend. Silicon hetero-nanowires with integrated III-V segments are one of the most promising candidates for advanced nano-optoelectronics, as first demonstrated using molecular beam epitaxy techniques. Here we demonstrate a novel route for InAs/Si hybrid nanowire fabrication via millisecond range liquid-phase epitaxy regrowth using sequential ion beam implantation and flash-lamp annealing. We show that such highly mismatched systems can be monolithically integrated within a single nanowire. Optical and microstructural investigations confirm the high quality hetero-nanowire fabrication coupled with the formation of atomically sharp interfaces between Si and InAs segments. Such hybrid systems open new routes for future high-speed and multifunctional nanoelectronic devices on a single chip.