Role of LAP^+CD4^+ T cells in the tumor microenvironment of colorectal cancer

AIM To investigate the abundance and potential functions of LAP^+CD4^+ T cells in colorectal cancer(CRC). METHODS Proportions of LAP^+CD4^+ T cells were examined in peripheral blood and tumor/paratumor tissues of CRC patients and healthy controls using flow cytometry. Expression of phenotypic markers such as forkhead box(Fox)p3, cytotoxic T-lymphocyte-associated protein(CTLA)-4, chemokine CC receptor (CCR)4 and CCR5 was measured using flow cytometry. LAP^-CD4^+ and LAP^+CD4^+ T cells were isolated using a magnetic cellsorting system and cell purity was analyzed by flow cytometry. Real-time quantitative polymerase chain reaction was used to measure expression of cytokines interleukin (IL)-10 and transforming growth factor(TGF)-β.RESULTS The proportion of LAP^+CD4^+ T cells was significantly higher in peripheral blood from patients (9.44% ± 3.18%) than healthy controls (1.49% ± 1.00%, P < 0.001). Among patients, the proportion of LAP^+CD4^+ T cells was significantly higher in tumor tissues(11.76% ± 3.74%) compared with paratumor tissues (3.87% ± 1.64%, P < 0.001). We also observed positive correlations between the proportion of LAP^+CD4^+ T cells and TNM stage(P < 0.001), distant metastasis(P < 0.001) and serum level of carcinoembryonic antigen(P < 0.05). Magnetic-activated cell sorting gave an overall enrichment of LAP^+CD4^+ T cells (95.02% ± 2.87%), which was similar for LAP^-CD4^+ T cells(94.75% ± 2.76%). In contrast to LAP^-CD4^+ T cells, LAP^+CD4^+ T cells showed lower Foxp3 expression but significantly higher levels of CTLA-4, CCR4 and CCR5(P < 0.01). LAP^+CD4^+ T cells expressed significantly larger amounts of IL-10 and TGF-β but lower levels of IL-2, IL-4, IL-17 and interferon-γ, compared with LAPCD4+ T cells.CONCLUSION LAP^+CD4^+ T cells accumulated in the tumor microenvironment of CRC patients and were involved in immune evasion mediated by IL-10 and TGF-β.

Scratch-concerned yield modeling for IC manufacturing involved with a chemical mechanical polishing process

In existing integrated circuit (IC) fabrication methods,the yield is typically limited by defects generated in the manufacturing process.In fact,the yield often shows a good correlation with the type and density of the defect.As a result,an accurate defect limited yield model is essential for accurate correlation analysis and yield prediction.Since real defects exhibit a great variety of shapes,to ensure the accuracy of yield prediction,it is necessary to select the most appropriate defect model and to extract the critical area based on the defect model.Considering the realistic outline of scratches introduced by the chemical mechanical polishing (CMP) process,we propose a novel scratch-concerned yield model.A linear model is introduced to model scratches.Based on the linear model,the related critical area extraction algorithm and defect density distribution are discussed.Owing to higher correspondence with the realistic outline of scratches,the linear defect model enables a more accurate yield prediction caused by scratches and results in a more accurate total product yield prediction as compared to the traditional circular model.

A new via chain design method considering confidence level and estimation precision

For accurate prediction of via yield, via chains are usually fabricated on test chips to investigate issues about vias. To minimize the randomness of experiments and make the testing results more convincing, the confidence level and estimation precision of the via failure rate are investigated in this paper. Based on the Poisson yield model, the method of determining an adequate number of total vias is obtained using the law of large numbers and the de Moivre-Laplace theorem. Moreover, for a specific confidence level and estimation precision, the method of determining a suitable via chain length is proposed. For area minimization, an optimal combination of total vias and via chain length is further determined. Monte Carlo simulation results show that the method is in good accordance with theoretical analyses. Results of via failure rates measured on test chips also reveal that via chains designed using the proposed method has a better performance. In addition, the proposed methodology can be extended to investigate statistical significance for other failure modes.

Novel serpentine structure design method considering confidence level and estimation precision

Due to the importance of metal layers in the product yield,serpentine test structures are usually fabricated on test chips to extract parameters for yield prediction.In this paper,the confidence level and estimation precision of the average defect density on metal layers are investigated to minimize the randomness of experimental results and make the measured parameters more convincing.On the basis of the Poisson yield model,the method to determine the total area of all serpentine test structures is obtained using the law of large numbers and the Lindeberg-Levy theorem.Furthermore,the method to determine an adequate area of each serpentine test structure is proposed under a specific requirement of confidence level and estimation precision.The results of Monte Carlo simulation show that the proposed method is consistent with theoretical analyses.It is also revealed by wafer experimental results that the method of designing serpentine test structure proposed in this paper has better performance.