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Engineering Strategies for Suppressing the Shuttle Effect in Lithium–Sulfur Batteries 被引量:2
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作者 Jiayi Li Li Gao +7 位作者 Fengying Pan Cheng Gong limeng sun Hong Gao Jinqiang Zhang Yufei Zhao Guoxiu Wang Hao Liu 《Nano-Micro Letters》 SCIE EI CAS CSCD 2024年第1期187-221,共35页
Lithium–sulfur(Li–S)batteries are supposed to be one of the most potential next-generation batteries owing to their high theoretical capacity and low cost.Nevertheless,the shuttle effect of firm multi-step two-elect... Lithium–sulfur(Li–S)batteries are supposed to be one of the most potential next-generation batteries owing to their high theoretical capacity and low cost.Nevertheless,the shuttle effect of firm multi-step two-electron reaction between sulfur and lithium in liquid electrolyte makes the capacity much smaller than the theoretical value.Many methods were proposed for inhibiting the shuttle effect of polysulfide,improving corresponding redox kinetics and enhancing the integral performance of Li–S batteries.Here,we will comprehensively and systematically summarize the strategies for inhibiting the shuttle effect from all components of Li–S batteries.First,the electrochemical principles/mechanism and origin of the shuttle effect are described in detail.Moreover,the efficient strategies,including boosting the sulfur conversion rate of sulfur,confining sulfur or lithium polysulfides(LPS)within cathode host,confining LPS in the shield layer,and preventing LPS from contacting the anode,will be discussed to suppress the shuttle effect.Then,recent advances in inhibition of shuttle effect in cathode,electrolyte,separator,and anode with the aforementioned strategies have been summarized to direct the further design of efficient materials for Li–S batteries.Finally,we present prospects for inhibition of the LPS shuttle and potential development directions in Li–S batteries. 展开更多
关键词 Shuttle effect Designed strategies Li-S battery Lithium polysulfides
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高速电流舵数模转换器减小时序失配的方法 被引量:1
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作者 付裕深 黄成宇 +2 位作者 孙立猛 李学清 杨华中 《中国科学:信息科学》 CSCD 北大核心 2022年第4期675-686,共12页
随着电流舵数模转换器(digital-to-analog converter,DAC)工作频率的提高,即使是数百飞秒的时序失配也会严重恶化高性能DAC的动态性能.在这一类DAC中,锁存驱动器模块直接控制电流源的开关切换,其时序直接影响电流舵DAC输出模拟信号的码... 随着电流舵数模转换器(digital-to-analog converter,DAC)工作频率的提高,即使是数百飞秒的时序失配也会严重恶化高性能DAC的动态性能.在这一类DAC中,锁存驱动器模块直接控制电流源的开关切换,其时序直接影响电流舵DAC输出模拟信号的码间过渡动态特性.电流舵DAC锁存驱动器时序失配的主要来源,包括时钟网络延时失配、开关驱动晶体管的梯度失配和随机失配.一方面,在传统时钟网络中,不同位置节点间的失配是时钟网络延时失配的重要来源;另一方面,增加开关驱动晶体管尺寸可减少随机失配造成的延时偏差,但增加梯度失配造成的延时偏差.为了减小锁存驱动器时序失配提升DAC动态性能,本文提出了一种通过改变时钟网络连接方式减小时钟延时失配的方法,以及一种综合考虑梯度失配与随机失配的联合设计方法.为了验证所提方法的有效性,在65 nm工艺下设计了一个14b精度的DAC,流片测试结果表明在1 GS/s采样率、430 MHz信号带宽内,实测的无杂散动态范围(spurious-free dynamic range,SFDR)大于70 dB.与相同工艺下设计但并未采用本文所提出的时序优化方法的DAC测试结果对比表明,本文提出的时序优化方法以功耗从106 mW提升到160 mW为代价,将SFDR大于70 dB的信号带宽从210 MHz提升到430 MHz. 展开更多
关键词 时序失配 数模转换器(DAC) 时钟网络 梯度失配 随机失配 无杂散动态范围(SFDR)
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