Effect of charge trapping on electrical characteristics of silicon junctionless nanowire transistor

We investigated the effect of charge trapping on electrical characteristics of silicon junctionless nanowire transistors which are fabricated on heavily n-type doped silicon-on-insulator substrate. The obvious random telegraph noise and current hysteresis observed at the temperature of 10 K indicate the existence of acceptor-like traps. The position depth of the traps in the oxide from Si/SiO_(2) interface is 0.35 nm, calculated by utilizing the dependence of the capture and emission time on the gate voltage. Moreover, by constructing a three-dimensional model of tri-gate device structure in COMSOL Multiphysics simulation software, we achieved the trap density of 1.9 × 10^(12) cm^(–2) and the energy level position of traps at 0.18 eV below the intrinsic Fermi level.

From parabolic approximation to evanescent mode analysis on SOI MOSFET

Subthreshold conduction is governed by the potential distribution. We focus on full two-dimensional（2D） analytical modeling in order to evaluate the 2D potential profile within the active area of Fin FET structure.Surfaces and interfaces, which are key nanowire elements, are carefully studied. Different structures have different boundary conditions, and therefore different effects on the potential distributions. A range of models in Fin FET are reviewed in this paper. Parabolic approximation and evanescent mode are two different basic math methods to simplify the Poisson＇s equation. Both superposition method and parabolic approximation are widely used in heavily doped devices. It is helpful to learn performances of MOSFETs with different structures. These two methods achieved improvement to face different structures from heavily doped devices or lightly doped devices to junctionless transistors.

Dopant atoms as quantum components in silicon nanoscale devices

Recent progress in nanoscale fabrication allows many fundamental studies of the few dopant atoms in various semiconductor nanostructures. Since the size of nanoscale devices has touched the limit of the nature, a single dopant atom may dominate the performance of the device. Besides, the quantum computing considered as a future choice beyond Moore＇s law also utilizes dopant atoms as functional units. Therefore, the dopant atoms will play a significant role in the future novel nanoscale devices. This review focuses on the study of few dopant atoms as quantum components in silicon nanoscale device. The control of the number of dopant atoms and unique quantum transport characteristics induced by dopant atoms are presented. It can be predicted that the development of nanoelectronics based on dopant atoms will pave the way for new possibilities in quantum electronics.