Function synthesis algorithm based on RTD-based three-variable universal logic gates

Compared with complementary metal–oxide semiconductor(CMOS), the resonant tunneling device(RTD) has better performances; it is the most promising candidate for next-generation integrated circuit devices. The universal logic gate is an important unit circuit because of its powerful logic function, but there are few function synthesis algorithms that can implement an n-variable logical function by RTD-based universal logic gates. In this paper, we propose a new concept, i.e., the truth value matrix. With it a novel disjunctive decomposition algorithm can be used to decompose an arbitrary n-variable logical function into three-variable subset functions. On this basis, a novel function synthesis algorithm is proposed, which can implement arbitrary n-variable logical functions by RTD-based universal threshold logic gates(UTLGs), RTD-based three-variable XOR gates(XOR3s), and RTD-based three-variable universal logic gate(ULG3s). When this proposed function synthesis algorithm is used to implement an n-variable logical function, if the function is a directly disjunctive decomposition one, the circuit structure will be very simple, and if the function is a non-directly disjunctive decomposition one, the circuit structure will be simpler than when using only UTLGs or ULG3s. The proposed function synthesis algorithm is straightforward to program, and with this algorithm it is convenient to implement an arbitrary n-variable logical function by RTD-based universal logic gates.

Design of a novel RTD-based three-variable universal logic gate

Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modem devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode （RTD） is well suited for imple- menting the threshold logic gate because of its high-speed switching capability, negative differential resistance （NDR） charac- teristic, and functional versatility. In this paper, based on the Reed-Muller （RM） algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a program- mable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate （ULG3） is proposed, composed of two RTD-based universal threshold logic gates （UTLG） and an RTD-based three-variable XOR gate （XOR3）. The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.

Emitter-couple logic circuit design based on the threshold-arithmetic algebraic system

Based on the threshold-arithmetic algebraic system which has been proposed for current-mode circuit design,we propose a systematic methodology for emitter-couple logic(ECL)circuit design.Compared to the traditional methodologies and the theory of differential current switches,the proposed methodology uses the HE map and the characteristics of the internal current signals of ECL circuits to determine the external voltage signals.The operations of the HE map are direct and simple,and the current signals are easy to add or subtract,which make this methodology more flexible,direct,and effective,and make it possible to design arbitrary binary and multi-valued logic functions.Two example circuits are designed and simulated by HSPICE using 0.18μm TSMC technology.Simulation results confirm the validity of the proposed methodology.