Accelerating hybrid and compact neural networks targeting perception and control domains with coarse-grained dataflow reconfiguration

Driven by continuous scaling of nanoscale semiconductor technologies,the past years have witnessed the progressive advancement of machine learning techniques and applications.Recently,dedicated machine learning accelerators,especially for neural networks,have attracted the research interests of computer architects and VLSI designers.State-of-the-art accelerators increase performance by deploying a huge amount of processing elements,however still face the issue of degraded resource utilization across hybrid and non-standard algorithmic kernels.In this work,we exploit the properties of important neural network kernels for both perception and control to propose a reconfigurable dataflow processor,which adjusts the patterns of data flowing,functionalities of processing elements and on-chip storages according to network kernels.In contrast to stateof-the-art fine-grained data flowing techniques,the proposed coarse-grained dataflow reconfiguration approach enables extensive sharing of computing and storage resources.Three hybrid networks for MobileNet,deep reinforcement learning and sequence classification are constructed and analyzed with customized instruction sets and toolchain.A test chip has been designed and fabricated under UMC 65 nm CMOS technology,with the measured power consumption of 7.51 mW under 100 MHz frequency on a die size of 1.8×1.8 mm^2.

Real-Time Video Transmission of Visible Light Communication Based on LED

In order to realize the video image transmission and the excellent lighting function of the visible light communication system, a LED-based visible light communication method and system is proposed. Based on the field programmable gate array (FPGA) hardware, the RS channel coding is applied to the visible light communication system. A pulse position decision algorithm is proposed, which is applied to the receiver of the visible light communication system to meet the error-free decision of the signal. The design of the system is based on the analog-to-digital conversion circuit, which provides a large signal dynamic range for the pulse position decision algorithm, and designs the LED driver based on the bias circuit to realize the fast broadband modulation of the signal. The test results show that the combined application of pulse position decision algorithm and Reed-Solomon codec can reduce the error of system signal and meet the real-time and reliable transmission of signal. The system can display the received video in real time from the receiver, and the whole system communication distance up to 5 m.