Insider Attack Prevention:LAPUP—Lightweight Authentication Protocol Using PUF

The incredible progress in technologies has drastically increased the usage of Web applications.Users share their credentials like userid and password or use their smart cards to get authenticated by the application servers.Smart cards are handy to use,but they are susceptible to stolen smart card attacks and few other notable security attacks.Users prefer to use Web applications that guarantee for security against several security attacks,especially insider attacks,which is crucial.Cryptanalysis of several existing schemes prove the security pitfalls of the protocols from preventing security attacks,specifically insider attacks.This paper introduces LAPUP:a novel lightweight authentication protocol using physically unclonable function(PUF)to prevent security attacks,principally insider attacks.The PUFs are used to generate the security keys,challenge-response pair(CRP)and hardware signature for designing the LAPUP.The transmitted messages are shared as hash values and encrypted by the keys generated by PUF.These messages are devoid of all possible attacks executed by any attacker,including insider attacks.LAPUP is also free from stolen verifier attacks,as the databases are secured by using the hardware signature generated by PUFs.Security analysis of the protocol exhibits the strength of LAPUP in preventing insider attacks and its resistance against several other security attacks.The evaluation results of the communication and computation costs of LAPUP clearly shows that it achieves better performance than existing protocols,despite providing enhanced security.

Secure and Energy Efficient Design of Multi-Modular Exponential Techniques for Public-Key Cryptosystem

The present paper proposes a secure design of the energy-efficient multi-modular exponential techniques that use store and reward method and store and forward method.Computation of the multi-modular exponentiation can be performed by three novel algorithms:store and reward,store and forward 1-bit(SFW1),and store and forward 2-bit(SFW2).Hardware realizations of the proposed algorithms are analyzed in terms of throughput and energy.The experimental results show the proposed algorithms SFW1 and SFW2 increase the throughput by orders of 3.98% and 4.82%,reducing the power by 5.32% and 6.15% and saving the energy in the order of 3.95% and 4.75%,respectively.The proposed techniques can prevent possible side-channel attacks and timing attacks as a consequence of an inbuilt confusion mechanism.Xilinx Vivado-21 on Virtex-7 evaluation board and integrated computer application for recognizing user services(ICARUS)Verilog simulation and synthesis tools are used for field programmable gate array(FPGA)for hardware realization.The hardware compatibility of proposed algorithms has also been checked using Cadence for application specific integrated circuit(ASIC).