We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors(PMOSFETs)with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process.In the process,SiO_(2)/poly-Si is adopted as the dummy ...We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors(PMOSFETs)with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process.In the process,SiO_(2)/poly-Si is adopted as the dummy gate stack and replaced by an HfSiAlON/MoAlN gate stack after source/drain formation.Because of the high-k/metal-gate stack formation after the 1000℃source/drain ion-implant doping activation,the fabricated PMOSFET has good electrical characteristics.The device's saturation driving current is 2.71×10^(-4) A/μm(VGS=VDS=-1.5 V)and the off-state current is 2.78×10^(-9) A/μm.The subthreshold slope of 105 mV/dec(VDS=-1.5 V),drain induced barrier lowering of 80 mV/V and Vth of -0.3 V are obtained.The research indicates that the present PMOSFET could be a solution for high performance PMOSFET applications.展开更多
基金Supported by the National Natural Science Foundation of China(61822407,62074161,62004213)the National Key Research and De-velopment Program of China under(2018YFE0125700)。
基金Supported by the Beijing Natural Science Foundation under Grant No 4123106the Important National Science&Technology Specific Projects of China under Grant No 2009ZX02035.
文摘We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors(PMOSFETs)with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process.In the process,SiO_(2)/poly-Si is adopted as the dummy gate stack and replaced by an HfSiAlON/MoAlN gate stack after source/drain formation.Because of the high-k/metal-gate stack formation after the 1000℃source/drain ion-implant doping activation,the fabricated PMOSFET has good electrical characteristics.The device's saturation driving current is 2.71×10^(-4) A/μm(VGS=VDS=-1.5 V)and the off-state current is 2.78×10^(-9) A/μm.The subthreshold slope of 105 mV/dec(VDS=-1.5 V),drain induced barrier lowering of 80 mV/V and Vth of -0.3 V are obtained.The research indicates that the present PMOSFET could be a solution for high performance PMOSFET applications.
