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Test Time Minimization for Hybrid BIST of Core-Based Systems
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作者 Gert Jervan petru eles +2 位作者 Zebo Peng Raimund Ubar Maksim Jenihhin 《Journal of Computer Science & Technology》 SCIE EI CSCD 2006年第6期907-912,共6页
This paper presents a solution to the test time minimization problem for core-based systems. We assume a hybrid BIST approach, where a test set is assembled, for each core, from pseudorandom test patterns that are gen... This paper presents a solution to the test time minimization problem for core-based systems. We assume a hybrid BIST approach, where a test set is assembled, for each core, from pseudorandom test patterns that are generated online, and deterministic test patterns that are generated off-line and stored in the system. In this paper we propose an iterative algorithm to find the optimal combination of pseudorandom and deterministic test sets of the whole system, consisting of multiple cores, under given memory constraints, so that the total test time is minimized. Our approach cmploys a fast estimation methodology in order to avoid exhaustive search and to speed-up the calculation process. Experimental results have shown the efficiency of the algorithm to find near optimal solutions. 展开更多
关键词 SoC SELF-TEST hybrid BIST
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