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Device performance limit of monolayer SnSe_(2) MOSFET 被引量:1
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作者 Hong Li Jiakun Liang +5 位作者 qida wang Fengbin Liu Gang Zhou Tao Qing Shaohua Zhang Jing Lu 《Nano Research》 SCIE EI CSCD 2022年第3期2522-2530,共9页
Two-dimensional(2D)semiconductors are attractive channels to shrink the scale of field-effect transistors(FETs),and among which the anisotropic one is more advantageous for a higher on-state current(I_(on)).Monolayer(... Two-dimensional(2D)semiconductors are attractive channels to shrink the scale of field-effect transistors(FETs),and among which the anisotropic one is more advantageous for a higher on-state current(I_(on)).Monolayer(ML)SnSe_(2),as an abundant,economic,nontoxic,and stable two-dimensional material,possesses an anisotropic electronic nature.Herein,we study the device performances of the ML SnSe_(2) metal-oxide-semiconductor FETs(MOSFETs)and deduce their performance limit to an ultrashort gate length(L_(g))and ultralow supply voltage(V_(dd))by using the ab initio quantum transport simulation.An ultrahigh I_(on) of 5,660 and 3,145µA/µm is acquired for the n-type 10-nm-L_(g) ML SnSe_(2) MOSFET at V_(dd)=0.7 V for high-performance(HP)and low-power(LP)applications,respectively.Specifically,until L_(g) scales down to 2 and 3 nm,the MOSFETs(at V_(dd)=0.65 V)surpass I_(on),intrinsic delay time(τ),and power-delay product(PDP)of the International Roadmap for Device and Systems(IRDS,2020 version)for HP and LP devices for the year 2028.Moreover,the 5-nm-L_(g) ML SnSe_(2) MOSFET(at V_(dd)=0.4 V)fulfills the IRDS HP device and the 7-nm-L_(g) MOSFET(at V_(dd)=0.55 V)fulfills the IRDS LP device for the year 2034. 展开更多
关键词 monolayer(ML)SnSe_(2) ANISOTROPIC metal-oxide-semiconductor field-effect transistor(MOSFET) device performance limit ab initio transport simulation
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