In this paper, multiresolution critical-point filters （CPFs） are employed to image matching for frame rate up-conversion （FRUC）. By CPF matching, the dense motion field can be obtained for representing object moti...In this paper, multiresolution critical-point filters （CPFs） are employed to image matching for frame rate up-conversion （FRUC）. By CPF matching, the dense motion field can be obtained for representing object motions accurately. However, the elastic motion model does not hold in the areas of occlusion, thus resulting in blur artifacts in the interpolated frame. To tackle this problem, we propose a new FRUC scheme using an occlusion refined CPF matching interpolation （ORCMI）. In the proposed approach, the occlusion refinement is based on a bidirectional CPF mapping. And the intermediate frames are generated by the bidirectional interpolation for non-occlusion pixels combined with unidirectional projection for the occlusion pixels. Ex- perimental results show that ORCMI improves the visual quality of the interpolated frames, especially at the occlusion regions. Compared to the block matching based FRUC algorithm, ORCM1 can achieve 1-2 dB PSNR gain for standard video sequences.展开更多
This study presents a new method of 4-pipelined high-performance split multiply-accumulator (MAC) architecture, which is capable of supporting multiple precisions developed for media processors. To speed up the design...This study presents a new method of 4-pipelined high-performance split multiply-accumulator (MAC) architecture, which is capable of supporting multiple precisions developed for media processors. To speed up the design further, a novel partial product compression circuit based on interleaved adders and a modified hybrid partial product reduction tree (PPRT) scheme are proposed. The MAC can perform 1-way 32-bit, 4-way 16-bit signed/unsigned multiply or multiply-accumulate operations and 2-way parallel multiply add (PMADD) operations at a high frequency of 1.25 GHz under worst-case conditions and 1.67 GHz under typical-case conditions, respectively. Compared with the MAC in 32-bit microprocessor without interlocked piped stages (MIPS), the proposed design shows a great advantage in speed. Moreover, an improvement of up to 32% in throughput is achieved. The MAC design has been fabricated with Taiwan Semiconductor Manufacturing Company (TSMC) 90-nm CMOS standard cell technology and has passed a functional test.展开更多
基金Project (No. 2004C21052) supported by the Key Program of the Science and Technology Commission Foundation of Zhejiang Province, China
文摘In this paper, multiresolution critical-point filters （CPFs） are employed to image matching for frame rate up-conversion （FRUC）. By CPF matching, the dense motion field can be obtained for representing object motions accurately. However, the elastic motion model does not hold in the areas of occlusion, thus resulting in blur artifacts in the interpolated frame. To tackle this problem, we propose a new FRUC scheme using an occlusion refined CPF matching interpolation （ORCMI）. In the proposed approach, the occlusion refinement is based on a bidirectional CPF mapping. And the intermediate frames are generated by the bidirectional interpolation for non-occlusion pixels combined with unidirectional projection for the occlusion pixels. Ex- perimental results show that ORCMI improves the visual quality of the interpolated frames, especially at the occlusion regions. Compared to the block matching based FRUC algorithm, ORCM1 can achieve 1-2 dB PSNR gain for standard video sequences.
基金Project (No. 60873112) supported by the National Natural Science Foundation of China
文摘This study presents a new method of 4-pipelined high-performance split multiply-accumulator (MAC) architecture, which is capable of supporting multiple precisions developed for media processors. To speed up the design further, a novel partial product compression circuit based on interleaved adders and a modified hybrid partial product reduction tree (PPRT) scheme are proposed. The MAC can perform 1-way 32-bit, 4-way 16-bit signed/unsigned multiply or multiply-accumulate operations and 2-way parallel multiply add (PMADD) operations at a high frequency of 1.25 GHz under worst-case conditions and 1.67 GHz under typical-case conditions, respectively. Compared with the MAC in 32-bit microprocessor without interlocked piped stages (MIPS), the proposed design shows a great advantage in speed. Moreover, an improvement of up to 32% in throughput is achieved. The MAC design has been fabricated with Taiwan Semiconductor Manufacturing Company (TSMC) 90-nm CMOS standard cell technology and has passed a functional test.
