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Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
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作者 Xinzhu Gao Quan Chen +7 位作者 qinggang qin Liang Li Meizhuang Liu Derek Hao Junjie Li Jingbo Li Zhongchang Wang Zuxin Chen 《Nano Research》 SCIE EI CSCD 2024年第3期1886-1892,共7页
Combining logical function and memory characteristics of transistors is an ideal strategy for enhancing computational efficiency of transistor devices.Here,we rationally design a tri-gate two-dimensional(2D)ferroelect... Combining logical function and memory characteristics of transistors is an ideal strategy for enhancing computational efficiency of transistor devices.Here,we rationally design a tri-gate two-dimensional(2D)ferroelectric van der Waals heterostructures device based on copper indium thiophosphate(CuInP_(2)S_(6))and few layers tungsten disulfide(WS_(2)),and demonstrate its multi-functional applications in multi-valued state of data,non-volatile storage,and logic operation.By co-regulating the input signals across the tri-gate,we show that the device can switch functions flexibly at a low supply voltage of 6 V,giving rise to an ultra-high current switching ratio of 107 and a low subthreshold swing of 53.9 mV/dec.These findings offer perspectives in designing smart 2D devices with excellent functions based on ferroelectric van der Waals heterostructures. 展开更多
关键词 two-dimensional(2D)ferroelectric HETEROSTRUCTURE tri-gate polymorphic regulation in-memory computing
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