Modified Black Widow Optimization-Based Enhanced Threshold Energy Detection Technique for Spectrum Sensing in Cognitive Radio Networks

This study develops an Enhanced Threshold Based Energy Detection approach(ETBED)for spectrum sensing in a cognitive radio network.The threshold identification method is implemented in the received signal at the secondary user based on the square law.The proposed method is implemented with the signal transmission of multiple outputs-orthogonal frequency division multiplexing.Additionally,the proposed method is considered the dynamic detection threshold adjustments and energy identification spectrum sensing technique in cognitive radio systems.In the dynamic threshold,the signal ratio-based threshold is fixed.The threshold is computed by considering the Modified Black Widow Optimization Algorithm(MBWO).So,the proposed methodology is a combination of dynamic threshold detection and MBWO.The general threshold-based detection technique has different limitations such as the inability optimal signal threshold for determining the presence of the primary user signal.These limitations undermine the sensing accuracy of the energy identification technique.Hence,the ETBED technique is developed to enhance the energy efficiency of cognitive radio networks.The projected approach is executed and analyzed with performance and comparison analysis.The proposed method is contrasted with the conventional techniques of theWhale Optimization Algorithm(WOA)and GreyWolf Optimization(GWO).It indicated superior results,achieving a high average throughput of 2.2 Mbps and an energy efficiency of 3.8,outperforming conventional techniques.

Region-Aware Trace Signal Selection Using Machine Learning Technique for Silicon Validation and Debug

In today’s modern design technology,post-silicon validation is an expensive and composite task.The major challenge involved in this method is that it has limited observability and controllability of internal signals.There will be an issue during execution how to address the useful set of signals and store it in the on-chip trace buffer.The existing approaches are restricted to particular debug set-up where all the components have equivalent prominence at all the time.Practically,the verification engineers will emphasis only on useful functional regions or components.Due to some constraints like clock gating,some of the regions can be ignored during execution.Likewise,some of these regions can be verified deeply and have minimum errors compared to other control regions.The proposed system focusses on random signals that identify more errors which are prone to signal selection technique with low area overhead.To enhance the observability,a machine learning technique is developed.Based on the training samples of smaller designs,a model is developed to find out the contiguous neighbours of each flip-flop.This can eliminate the obstacles of unknown signals.This system demonstrates using Opencores and ISCAS’89 benchmark circuits that result in easy and fast error detection compared to the state-of-theart of other methods.This is also verified using gate-level error models by cross-validation of each debug run.