This paper presents two new efficient ternary Full Adder cells for nanoelectronics. These CNTFETbased ternary Full Adders are designed based on the unique characteristics of the CNTFET device, such as the capability o...This paper presents two new efficient ternary Full Adder cells for nanoelectronics. These CNTFETbased ternary Full Adders are designed based on the unique characteristics of the CNTFET device, such as the capability of setting the desired threshold voltages by adopting proper diameters for the nanotubes as well as the same carrier mobilities for the N-type and P-type devices. These characteristics of CNTFETs make them very suitable for designing high-performance multiple-Vth structures. The proposed structures reduce the number of the transistors considerably and have very high driving capability. The presented ternary Full Adders are simulated using Synopsys HSPICE with 32 nm CNTFET technology to evaluate their performance and to confirm their correct operation.展开更多
基金supported by the Grant number 600/1792 from the vice presidency of research and technology of Shahid Beheshti University,G.C
文摘This paper presents two new efficient ternary Full Adder cells for nanoelectronics. These CNTFETbased ternary Full Adders are designed based on the unique characteristics of the CNTFET device, such as the capability of setting the desired threshold voltages by adopting proper diameters for the nanotubes as well as the same carrier mobilities for the N-type and P-type devices. These characteristics of CNTFETs make them very suitable for designing high-performance multiple-Vth structures. The proposed structures reduce the number of the transistors considerably and have very high driving capability. The presented ternary Full Adders are simulated using Synopsys HSPICE with 32 nm CNTFET technology to evaluate their performance and to confirm their correct operation.
