Ferroelectric hysteresis loop measurement under high driving frequency generally faces great challenges.Parasitic factors in testing circuits such as leakage current and RC delay could result in abnormal hysteresis lo...Ferroelectric hysteresis loop measurement under high driving frequency generally faces great challenges.Parasitic factors in testing circuits such as leakage current and RC delay could result in abnormal hysteresis loops with erroneous rem-nant polarization(P_(r))and coercive field(E_(c)).In this study,positive-up-negative-down(PUND)measurement under a wide fre-quency range was performed on a 10-nm thick Hf_(0.5)Zr_(0.5)O_(2) ferroelectric film.Detailed analysis on the leakage current and RC delay was conducted as the polarization switching occurs in the FE capacitor.After considering the time lag caused by RC delay,reasonable calibration of current response over the voltage pulse stimulus was employed in the integral of polarization current over time.In such a method,rational P-V loops measured at high frequencies(>1 MHz)was successfully achieved.This work provides a comprehensive understanding on the effect of parasitic factors on the polarization switching behavior of FE films.展开更多
基金supported by the Ministry of Science and Technology(MOST)of China under Grant 2016YFA0203800in part by the National Natural Science Foundation of China under Grants 61834009,62025406,92064003,61821091the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant XDB44010300。
文摘Ferroelectric hysteresis loop measurement under high driving frequency generally faces great challenges.Parasitic factors in testing circuits such as leakage current and RC delay could result in abnormal hysteresis loops with erroneous rem-nant polarization(P_(r))and coercive field(E_(c)).In this study,positive-up-negative-down(PUND)measurement under a wide fre-quency range was performed on a 10-nm thick Hf_(0.5)Zr_(0.5)O_(2) ferroelectric film.Detailed analysis on the leakage current and RC delay was conducted as the polarization switching occurs in the FE capacitor.After considering the time lag caused by RC delay,reasonable calibration of current response over the voltage pulse stimulus was employed in the integral of polarization current over time.In such a method,rational P-V loops measured at high frequencies(>1 MHz)was successfully achieved.This work provides a comprehensive understanding on the effect of parasitic factors on the polarization switching behavior of FE films.
