We present a method of test generation for acyclic sequential circuits with hold registers. A complete (100% fault efficiency) test sequence for an acyclic sequential circuit can be obtained by applying a combinationa...We present a method of test generation for acyclic sequential circuits with hold registers. A complete (100% fault efficiency) test sequence for an acyclic sequential circuit can be obtained by applying a combinational test generator to all the maximal time-expansion models (TEMs) of the circuit. We propose a class of acyclic sequential circuits for which the number of maximal TEMs is one, i.e, the maximum TEM exists. For a circuit in the class, test generation can be performed by using only the maximum TEM. The proposed class of sequential circuits with the maximum TEM properly includes several known classes of acyclic sequential circuits such as balanced structures and acyclic sequential circuits without hold registers for which test generation can be also performed by using a combinational test generator. Therefore, in general, the hardware overhead for partial scan based on the proposed structure is smaller than that based on balanced or acyclic sequential structure without hold registers.展开更多
The uncontrolled spread of the coronavirus disease 2019(COVID-19)pandemic has led to the emergence of different severe acute respiratory syndrome coronavirus 2(SARS-CoV-2)variants across the globe.The ongoing global v...The uncontrolled spread of the coronavirus disease 2019(COVID-19)pandemic has led to the emergence of different severe acute respiratory syndrome coronavirus 2(SARS-CoV-2)variants across the globe.The ongoing global vaccination strategy to curtail the COVID-19 juggernaut is threatened by the rapidly spreading variants of concern(VOC)and other regional mutants,which are less responsive to neutralization by infection-or vaccine-derived antibodies(Gomez et al.,2021;Wang et al.,2021).展开更多
文摘We present a method of test generation for acyclic sequential circuits with hold registers. A complete (100% fault efficiency) test sequence for an acyclic sequential circuit can be obtained by applying a combinational test generator to all the maximal time-expansion models (TEMs) of the circuit. We propose a class of acyclic sequential circuits for which the number of maximal TEMs is one, i.e, the maximum TEM exists. For a circuit in the class, test generation can be performed by using only the maximum TEM. The proposed class of sequential circuits with the maximum TEM properly includes several known classes of acyclic sequential circuits such as balanced structures and acyclic sequential circuits without hold registers for which test generation can be also performed by using a combinational test generator. Therefore, in general, the hardware overhead for partial scan based on the proposed structure is smaller than that based on balanced or acyclic sequential structure without hold registers.
基金supported by a grant-in-aid fromthe Japan Agency for Medical Researchand Development (JP19fk0108110,JP20he0522001, and JP21fk0108104)。
文摘The uncontrolled spread of the coronavirus disease 2019(COVID-19)pandemic has led to the emergence of different severe acute respiratory syndrome coronavirus 2(SARS-CoV-2)variants across the globe.The ongoing global vaccination strategy to curtail the COVID-19 juggernaut is threatened by the rapidly spreading variants of concern(VOC)and other regional mutants,which are less responsive to neutralization by infection-or vaccine-derived antibodies(Gomez et al.,2021;Wang et al.,2021).
