We present a new technique to achieve uniform lateral electric field and maximum breakdown voltage in lateral double-diffused metal-oxide-semiconductor transistors fabricated on silicon-on-insulator substrates. A line...We present a new technique to achieve uniform lateral electric field and maximum breakdown voltage in lateral double-diffused metal-oxide-semiconductor transistors fabricated on silicon-on-insulator substrates. A linearly increasing drift-region thickness from the source to the drain is employed to improve the electric field distribution in the devices. Compared to the lateral linear doping technique and the reduced surface field technique, twodimensional numerical simulations show that the new device exhibits reduced specific on-resistance, maximum off- and on-state breakdown voltages, superior quasi-saturation characteristics and improved safe operating area.展开更多
In this paper we describe a full-integrated circuit containing all building blocks of a completed PLL-based synthesizer except for low pass filter（LPF）. The frequency synthesizer is designed for a frequency hopping ...In this paper we describe a full-integrated circuit containing all building blocks of a completed PLL-based synthesizer except for low pass filter（LPF）. The frequency synthesizer is designed for a frequency hopping （FH） transceiver operating up to 1.5 GHz as a local oscillator. The architecture of Voltage Controlled Oscillator （VCO） is optimized to get better performance, and a phase noise of -111.85-dBc/Hz @ 1 MHz and a tuning range of 250 MHz are gained at a centre frequency of 1.35 GHz. A novel Dual-Modulus Prescaler（DMP） is designed to achieve a very low jitter and a lower power. The settling time of PLL is 80 μs while the reference frequency is 400 KHz.This monolithic frequency synthesizer is to integrate all main building blocks of PLL except for the low pass filter, with a maximum VCO output frequency of 1.5 GHz, and is fabricated with a 0.18 μm mixed signal CMOS process. Low power dissipation, low phase noise, large tuning range and fast settling time are gained in this design.展开更多
This paper presents the design and implementation of a fully integrated low noise multi-band LC-tank voltage-controlled-oscillator （VCO）. Multi-band operation is achieved by using switched-capacitor resonator. Addit...This paper presents the design and implementation of a fully integrated low noise multi-band LC-tank voltage-controlled-oscillator （VCO）. Multi-band operation is achieved by using switched-capacitor resonator. Additional three-bit binary weighted capacitor array is also used to extend frequency tuning range in each band. To lower phase noise, two noise filters are added and a linear varactor is adopted. Implemented in a 0.18 ~tm complementary-metal- oxide-semiconductor （CMOS） process, the VCO achieves a frequency tuning range covering 2.26-2.48 GHz, 2.48- 2.78 GHz, 2.94-3.38 GHz, and 3.45-4.23 GHz while occupies a chip area of 0.52 mm2. With a 1.8 V power supply, it draws a current of 10.9 mA, 10.6 mA, 8.8 mA, and 6.2 mA from the lowest band to the highest band respectively. The measured phase noise is - 109-- 120 dBc/Hz and - 121-- 131 dBc/Hz at a 1 MHz and 2.5 MHz offset from the carrier, respectively.展开更多
基金Supported by the National Natural Science Foundation of China under Grant 60806027, China Postdoctoral Science Foundation under Grant 20070411013, Jiangsu Provincial Natural Science Foundations under Grant No BK2007605, Foundation of Jiangsu Educational Committee under Grant 09KJB510010, and State Key Laboratory of Electronic Thin Films and Integrated Devices under Grant No KF2007001.
文摘We present a new technique to achieve uniform lateral electric field and maximum breakdown voltage in lateral double-diffused metal-oxide-semiconductor transistors fabricated on silicon-on-insulator substrates. A linearly increasing drift-region thickness from the source to the drain is employed to improve the electric field distribution in the devices. Compared to the lateral linear doping technique and the reduced surface field technique, twodimensional numerical simulations show that the new device exhibits reduced specific on-resistance, maximum off- and on-state breakdown voltages, superior quasi-saturation characteristics and improved safe operating area.
文摘In this paper we describe a full-integrated circuit containing all building blocks of a completed PLL-based synthesizer except for low pass filter（LPF）. The frequency synthesizer is designed for a frequency hopping （FH） transceiver operating up to 1.5 GHz as a local oscillator. The architecture of Voltage Controlled Oscillator （VCO） is optimized to get better performance, and a phase noise of -111.85-dBc/Hz @ 1 MHz and a tuning range of 250 MHz are gained at a centre frequency of 1.35 GHz. A novel Dual-Modulus Prescaler（DMP） is designed to achieve a very low jitter and a lower power. The settling time of PLL is 80 μs while the reference frequency is 400 KHz.This monolithic frequency synthesizer is to integrate all main building blocks of PLL except for the low pass filter, with a maximum VCO output frequency of 1.5 GHz, and is fabricated with a 0.18 μm mixed signal CMOS process. Low power dissipation, low phase noise, large tuning range and fast settling time are gained in this design.
基金supported by the Project of the State Key Development Program for Basic Research of China(2010CB327404)
文摘This paper presents the design and implementation of a fully integrated low noise multi-band LC-tank voltage-controlled-oscillator （VCO）. Multi-band operation is achieved by using switched-capacitor resonator. Additional three-bit binary weighted capacitor array is also used to extend frequency tuning range in each band. To lower phase noise, two noise filters are added and a linear varactor is adopted. Implemented in a 0.18 ~tm complementary-metal- oxide-semiconductor （CMOS） process, the VCO achieves a frequency tuning range covering 2.26-2.48 GHz, 2.48- 2.78 GHz, 2.94-3.38 GHz, and 3.45-4.23 GHz while occupies a chip area of 0.52 mm2. With a 1.8 V power supply, it draws a current of 10.9 mA, 10.6 mA, 8.8 mA, and 6.2 mA from the lowest band to the highest band respectively. The measured phase noise is - 109-- 120 dBc/Hz and - 121-- 131 dBc/Hz at a 1 MHz and 2.5 MHz offset from the carrier, respectively.
