针对宽带雷达检测门限值设置难度大、系统复杂度高、实时性差等问题,提出了一种UWB-SOSCA(Ultra-Wide Band-Smallest of Ordered Statistics and Cell Average)检测算法。该算法主要包括多相滤波、SOSCA恒虚警检测和二元积累。其中,多...针对宽带雷达检测门限值设置难度大、系统复杂度高、实时性差等问题,提出了一种UWB-SOSCA(Ultra-Wide Band-Smallest of Ordered Statistics and Cell Average)检测算法。该算法主要包括多相滤波、SOSCA恒虚警检测和二元积累。其中,多相滤波将宽带信号划分为多个子信道,降低通道速率;SOSCA恒虚警检测分别对各子信道进行自适应门限调整,提高各子信道检测概率;二元积累对各子信道的检测结果进行时域联合,优化宽带时域连续检测性能。实验结果表明,在信噪比等于7.33 dB,虚警概率为10~(-5)时,SOSCA恒虚警检测算法与传统恒虚警算法相比,检测概率可提升14%;当多相滤波输入信噪比为-5 dB时,UWB-SOSCA算法的宽带线性调频信号脉冲宽度测量偏差优于6.5 ns。该算法具有大监视带宽、大动态范围和高检测概率,可广泛应用于侦察接收机的雷达侦测工作。展开更多
By studying the core algorithm of a three-dimensional discrete wavelet transform(3-D DWT)in depth,this paper divides it into three one-dimensional discrete wavelet transforms(1-D DWTs).Based on the implementation of a...By studying the core algorithm of a three-dimensional discrete wavelet transform(3-D DWT)in depth,this paper divides it into three one-dimensional discrete wavelet transforms(1-D DWTs).Based on the implementation of a 3-D DWT software,a parallel architecture design of a very large-scale integration(VLSI)is produced.It needs three dual-port random-access memory(RAM)to store the temporary results and transpose the matrix,then builds up a pipeline model composed of the three 1-D DWTs.In the design,the finite state machine(FSM)is used well to control the flow.Compared with the serial mode,the experimental results of the post synthesized simulation show that the design method is correct and effective.It can increase the processing speed by about 66%,work at 59 MHz,and meet the real-time needs of the video encoder.展开更多
基金supported by the Defense Advanced Research Projects under Contract(No.41308010408).
文摘By studying the core algorithm of a three-dimensional discrete wavelet transform(3-D DWT)in depth,this paper divides it into three one-dimensional discrete wavelet transforms(1-D DWTs).Based on the implementation of a 3-D DWT software,a parallel architecture design of a very large-scale integration(VLSI)is produced.It needs three dual-port random-access memory(RAM)to store the temporary results and transpose the matrix,then builds up a pipeline model composed of the three 1-D DWTs.In the design,the finite state machine(FSM)is used well to control the flow.Compared with the serial mode,the experimental results of the post synthesized simulation show that the design method is correct and effective.It can increase the processing speed by about 66%,work at 59 MHz,and meet the real-time needs of the video encoder.
