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基于DMOS管的电荷灵敏前置放大器设计 被引量:3
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作者 高艳妮 苏弘 wembe tafo evariste 《核电子学与探测技术》 CAS CSCD 北大核心 2010年第1期67-70,共4页
提出了一种由DMOS场效应管构成的电荷灵敏前置放大器,可用于硅,Si(Li),CdZnTe及CsI探测器。该前置放大器采用不同于传统的阻容反馈式的电路结构,完全使用MOS管搭建,该前放的设计完成为设计实现ASIC电路准备了技术基础。由Multisi m仿真... 提出了一种由DMOS场效应管构成的电荷灵敏前置放大器,可用于硅,Si(Li),CdZnTe及CsI探测器。该前置放大器采用不同于传统的阻容反馈式的电路结构,完全使用MOS管搭建,该前放的设计完成为设计实现ASIC电路准备了技术基础。由Multisi m仿真结果看出该电荷灵敏前置放大器输出信号上升时间小于15ns,并且具有很好的稳定性。 展开更多
关键词 DMOS 电荷灵敏前置放大器 设计 仿真
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A low noise charge sensitive preamplifier with switch control feedback resistance 被引量:3
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作者 wembe tafo evariste SU Hong +2 位作者 PENG Yu WU Ming QIAN Yi 《Nuclear Science and Techniques》 SCIE CAS CSCD 2008年第1期39-44,共6页
In this paper, the design and analysis of a new low noise charge sensitive preamplifier for silicon strip, Si(Li), CdZnTe and CsI detectors etc. with switch control feedback resistance were described, the entire syste... In this paper, the design and analysis of a new low noise charge sensitive preamplifier for silicon strip, Si(Li), CdZnTe and CsI detectors etc. with switch control feedback resistance were described, the entire system to be built using the CMOS transistors. The circuit configuration of the CSP proposed in this paper can be adopted to develop CMOS-based Application Specific Integrated Circuit further for Front End Electronics of read-out system of nuclear physics, particle physics and astrophysics research, etc. This work is an implemented design that we succeed after a simulation to obtain a rise time less than 3ns, the output resistance less than 94? and the linearity almost good. 展开更多
关键词 电流放大器 粒子探测技术 开关 反射电阻
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Design and simulation of charge sensitive preamplifier with CMOS FET implemented as feedback capacitor C_(fp) 被引量:3
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作者 wembe tafo evariste SU Hong +1 位作者 GAO Yanni WU Ming 《Nuclear Science and Techniques》 SCIE CAS CSCD 2008年第4期241-245,共5页
In this paper,to design a new preamplifier for optimum performances with charged-particle or heavy-ion detectors,the CMOS FET is implemented as a feedback capacitor Cfp,so that the entire system should be built only w... In this paper,to design a new preamplifier for optimum performances with charged-particle or heavy-ion detectors,the CMOS FET is implemented as a feedback capacitor Cfp,so that the entire system should be built only with MOSFET. This work is a revolution design because to realize an ASIC for a preamplifier circuit,the capacitor will also be included. We succeed after a simulation to maintain a rise time less than 3 ns,the output resistance less than 94 ? and the linearity almost good. 展开更多
关键词 电流放大器 粒子探测技术 模拟实验 放射学
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Design and simulation of Gaussian shaping amplifier made only with CMOS FET for FEE of particle detector 被引量:2
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作者 wembe tafo evariste SU Hong +2 位作者 QIAN Yi KONG Jie WANG Tongxi 《Nuclear Science and Techniques》 SCIE CAS CSCD 2010年第5期312-315,共4页
The objective of this paper is to design and simulate a shaping amplifier circuit for silicon strip,Si(Li),CdZnTe and CsI detectors,etc.,which can be further integrated the whole system and adopted to develop CMOS-bas... The objective of this paper is to design and simulate a shaping amplifier circuit for silicon strip,Si(Li),CdZnTe and CsI detectors,etc.,which can be further integrated the whole system and adopted to develop CMOS-based application,specific integrated circuit for Front End Electronics(FEE) of read-out system of nuclear physics,particle physics and astrophysics research,etc.It's why we used only CMOS transistor to develop the entire system.A Pseudo-Gaussian shaping amplifier made by fourth-order integration stage and a differentiation stage give a result same as a true CR-RC4 filter,we perform shaping time in the range,465 ns to 2.76μs with a low output resistance and the linearity almost good. 展开更多
关键词 MOS场效应管 探测器 放大器 设计 高斯 CMOS晶体管 颗粒 成型
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用于粒子探测器的CMOS FET采样保持电路的设计与仿真(英文)
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作者 wembe tafo evariste 苏弘 +2 位作者 千奕 周朝阳 王同喜 《原子核物理评论》 CAS CSCD 北大核心 2010年第4期459-463,共5页
介绍了一个峰保持电路。该电路适用于silicon strip,Si(Li),CdZn Te and CsI等探测器,实现采样-保持功能。已成功进行了基于CMOSFET的采样-保持电路的设计和仿真,通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真... 介绍了一个峰保持电路。该电路适用于silicon strip,Si(Li),CdZn Te and CsI等探测器,实现采样-保持功能。已成功进行了基于CMOSFET的采样-保持电路的设计和仿真,通过使用Proteus的PSPICE仿真器和BSIMV3.3模型参数完成了电路性能的仿真。同时,实现了采样时间可在60ns到4.44s范围内进行选择,该电路具有较好的线性。 展开更多
关键词 采样保持 CMOS场效应管 峰值 仿真
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