A vision of post-exascale programming

Exascale systems have been under development for quite some time and will be available for use in a few years. ]t is time to think about future post-exascale systems. There are many main challenges with regard to future post-exascale systems, such as processor architecture, programming, storage, and interconnect. In this study, we discuss three significant programming challenges for future post-exascale systems： heterogeneity, parallelism, and fault tolerance. Based on our experience of programming on current large-scale systems, we propose several potential solutions for these challenges. Nevertheless, more research efforts are needed to solve these problems.

Providing Source Code Level Portability Between CPU and GPU with MapCG

Graphics processing units （GPU） have taken an important role in the general purpose computing market in recent years. At present, the common approach to programming GPU units is to write CPU specific code with low level GPU APIs such as CUDA. Although this approach can achieve good performance, it creates serious portability issues as programmers are required to write a specific version of the code for each potential target architecture. This results in high development and maintenance costs. We believe it is desirable to have a programming model which provides source code portability between CPUs and GPUs, as well as different GPUs. This would allow programmers to write one version of the code, which can be compiled and executed on either CPUs or GPUs efficiently without modification. In this paper, we propose MapCG, a MapReduce framework to provide source code level portability between CPUs and GPUs. In contrast to other approaches such as OpenCL, our framework, based on MapReduce, provides a high level programming model and makes programming much easier. We describe the design of MapCG, including the MapReduce-style high-level programming framework and the runtime system on the CPU and GPU. A prototype of the MapCG runtime, supporting multi-core CPUs and NVIDIA GPUs, was implemented. Our experimental results show that this implementation can execute the same source code efficiently on multi-core CPU platforms and GPUs, achieving an average speedup of 1.6-2.5x over previous implementations of MapReduce on eight commonly used applications.

Preface

ACM SIGOPS ChinaSys conference is organized twice a year by ChinaSys, which is an active community forresearchers and practitioners on computer systems in China. Since August 2015, ChinaSys has become an ACMSIGOPS chapter. The first ChinaSys conference happened in November 2011 in Shenzhen. Now it has become anew leading international forum for academia, industry, and government to present novel research results in theprinciple and practice of computer systems. All topic areas related to design and implementation of computersystems are of interest and in scope.

Preface

Dataflow architecture is a kind of computer architecture that contrasts the traditional yon Neumann architecture or control flow architecture. Although it is not commercially successful in general-purpose computer processor market as yet, the concepts of dataflow have been used in many areas such as digital signal processing, network routing and scientific computing, as well as parallel computing frameworks.

Special Section of JCST on Computer Architecture and Systems with Emerging Technologies

Introduction Research on computer architecture and systems is typically driven by technology and applications. Emerging technologies, such as non-volatile memory, brain-inspired computing and quantum computing, are shaping the future of computing. However, it is still at its early stage to use these technologies to build computer systems. This special section is an effort to encourage and promote research on emerging technologies from the computer architecture and software perspective.