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Ultra-thin chips for high-performance flexible electronics 被引量:12
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作者 Shoubhik Gupta william taube navaraj +1 位作者 Leandro Lorenzelli Ravinder Dahiya 《npj Flexible Electronics》 SCIE 2018年第1期50-66,共17页
Flexible electronics has significantly advanced over the last few years,as devices and circuits from nanoscale structures to printed thin films have started to appear.Simultaneously,the demand for high-performance ele... Flexible electronics has significantly advanced over the last few years,as devices and circuits from nanoscale structures to printed thin films have started to appear.Simultaneously,the demand for high-performance electronics has also increased because flexible and compact integrated circuits are needed to obtain fully flexible electronic systems.It is challenging to obtain flexible and compact integrated circuits as the silicon based CMOS electronics,which is currently the industry standard for high-performance,is planar and the brittle nature of silicon makes bendability difficult.For this reason,the ultra-thin chips from silicon is gaining interest.This review provides an in-depth analysis of various approaches for obtaining ultra-thin chips from rigid silicon wafer.The comprehensive study presented here includes analysis of ultra-thin chips properties such as the electrical,thermal,optical and mechanical properties,stress modelling,and packaging techniques.The underpinning advances in areas such as sensing,computing,data storage,and energy have been discussed along with several emerging applications(e.g.,wearable systems,m-Health,smart cities and Internet of Things etc.)they will enable.This paper is targeted to the readers working in the field of integrated circuits on thin and bendable silicon;but it can be of broad interest to everyone working in the field of flexible electronics. 展开更多
关键词 PERFORMANCE ELECTRONICS EVERYONE
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Heterogeneous integration of contact-printed semiconductor nanowires for high-performance devices on large areas 被引量:3
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作者 Carlos García Núñez Fengyuan Liu +3 位作者 william taube navaraj Adamos Christou Dhayalan Shakthivel Ravinder Dahiya 《Microsystems & Nanoengineering》 EI CSCD 2018年第1期208-222,共15页
In this work,we have developed a contact-printing system to efficiently transfer the bottom-up and top-down semiconductor nanowires(NWs),preserving their as-grown features with a good control over their electronic pro... In this work,we have developed a contact-printing system to efficiently transfer the bottom-up and top-down semiconductor nanowires(NWs),preserving their as-grown features with a good control over their electronic properties.In the close-loop configuration,the printing system is controlled with parameters such as contact pressure and sliding speed/stroke.Combined with the dry pre-treatment of the receiver substrate,the system prints electronic layers with high NW density(7 NWs/μm for bottom-up ZnO and 3 NWs/μm for top-down Si NWs),NW transfer yield and reproducibility.We observed compactly packed(~115 nm average diameters of NWs,with NW-to-NW spacing~165 nm)and well-aligned NWs(90%with respect to the printing direction).We have theoretically and experimentally analysed the role of contact force on NW print dynamics to investigate the heterogeneous integration of ZnO and Si NWs over pre-selected areas.Moreover,the contact-printing system was used to fabricate ZnO and Si NW-based ultraviolet(UV)photodetectors(PDs)with Wheatstone bridge(WB)configuration on rigid and flexible substrates.The UV PDs based on the printed ensemble of NWs demonstrate high efficiency,a high photocurrent to dark current ratio(>10^(4))and reduced thermal variations as a result of inherent self-compensation of WB arrangement.Due to statistically lesser dimensional variations in the ensemble of NWs,the UV PDs made from them have exhibited uniform response. 展开更多
关键词 NANOWIRES PRINTING INTEGRATION
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