Initial Phase Properties and Anti-interference Capability of Memristor Models

Memristor is a circuit device which describes the relationship between charge and magnetic flux. There have been three classical memristor models and many analyses about them. However the anti interference capability of each model has not been analyzed and the merits and demerits of each memristor model are lack of analyses. Therefore it is necessary to simulate and compare the memristor models. To get the feedback curves and analyze the anti interference capability of memristor models noise was added to each model in simulation software (matlab). The results show that the HP memristor model has the best anti interference capability. Moreover signals with different initial phases were input to each model and the quantity of the input signals was changed. The results show that the HP memristor model can best maintain its properties and the original precision among the three models.

A Novel Responsivity Model for Stripe-Shaped Ultraviolet Photodiode

A novel responsivity model, which is based on the solution of transport and continuity equation of carriers generated both in vertical and lateral PN junctions, is proposed for optical properties of stripe-shaped silicon ultraviolet (UV) photodiodes. With this model, the responsivity of the UV photodiode can be estimated. Fabricated in a standard 0.5 μm CMOS process, the measured spectral responsivity of the stripe-shaped UV photodiode shows a good match with the numerical simulation result of the responsivity model at the spectral of UV range. It means that the responsivity model, which is used for stripe-shaped UV photodiode, is reliable.

Design, Fabrication, and Measurement of Two Silicon-Based Ultraviolet and Blue-Extended Photodiodes

二基于硅紫外(紫外) 并且扩大蓝色的光电二极管被介绍，它为轻察觉被制作在紫外 / 蓝光谱范围。塑造条纹、八边形圆形的结构被设计验证 UV-responsivity 的参数，紫外选择，故障电压，和反应时间。极端浅的侧面的 pn 连接成功地在标准 0.5-m 被认识到扩大 pn 连接区域，提高紫外光的吸收，并且改进 responsivity 和量效率的互补金属氧化物半导体(互补金属氧化物半导体) 过程。说明的测试结果塑造条纹的结构有更低的故障电压，更高的 UV-responsicity，并且更高紫外选择。但是八边形圆形的结构有更低的黑暗电流。两结构的反应时间是几乎一样。

Simulation analysis of combined UV/blue photodetector in CMOS process by technology computer-aided design

A composite ultraviolet （UV）/blue photode- tector structure has been proposed, which is composed of P-type silicon substrate, Pwelb Nwell and N-channel metal- oxide-semiconductor field-effect transistor （NMOSFET） realized in the PweH. In this photodetector, lateral ring- shaped Pwell-Nwell junction was used to separate the photogenerated carriers, and non-equilibrium excess hole was injected to the Pwell bulk for changing the bulk potential and shifting the NMOSFET＇s threshold voltage as well as the output drain current. By technology computer-aided design （TCAD） device, simulation and analysis of this proposed photodetector were carried out. Simulation results show that the combined photodetector has enhanced responsivity to UV/blue spectrum. More- over, it exhibits very high sensitivity to weak and especially ultral-weak optical light. A sensitivity of 7000 A/W was obtained when an incident optical power of 0.01 μW was illuminated to the photodetector, which is 35000 times higher than the responsivity of a conventional silicon-based UV photodiode （usually is about 0.2 A/W）. As a result, this proposed combined photodetector has great potential values for UV applications.

Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor

The input/output(I/O)pins of an industry-level fluorescent optical fiber temperature sensor readout circuit need on-chip integrated high-performance electro-static discharge(ESD)protection devices.It is difficult for the failure level of basic N-type buried layer gate-controlled silicon controlled rectifier(NBL-GCSCR)manufactured by the 0.18µm standard bipolar-CMOS-DMOS(BCD)process to meet this need.Therefore,we propose an on-chip integrated novel deep N-well gate-controlled SCR(DNW-GCSCR)with a high failure level to effectively solve the problems based on the same semiconductor process.Technology computer-aided design(TCAD)simulation is used to analyze the device characteristics.SCRs are tested by transmission line pulses(TLP)to obtain accurate ESD parameters.The holding voltage(24.03 V)of NBL-GCSCR with the longitudinal bipolar junction transistor(BJT)path is significantly higher than the holding voltage(5.15 V)of DNW-GCSCR with the lateral SCR path of the same size.However,the failure current of the NBL-GCSCR device is 1.71 A,and the failure current of the DNW-GCSCR device is 20.99 A.When the gate size of DNW-GCSCR is increased from 2µm to 6µm,the holding voltage is increased from 3.50 V to 8.38 V.The optimized DNW-GCSCR(6µm)can be stably applied on target readout circuits for on-chip electrostatic discharge protection.

Design and Manufacture of Dual-gate DDSCR with High Failure Current and Holding Voltage

High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy these design requirements.To streamline the design and manufacturing of SCRs,this study proposes a novel dual-gate dual-direction SCR(DG-DDSCR)with a high failure current and holding voltage.First,four polysilicon gates,GateA1,GateA2,GateC1,and GateC2,were introduced to the N+and P+middle regions of the anode and cathode.When the voltage acts on the anode,the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path.Specifically,the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse(TLP)are 29.4 V and 16.7 A,respectively.When the clamping voltage was 40 V,the transient current release of the structure can reach 11.61 A,which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application.