Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very l...Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.展开更多
基金supported in part by the National Natural Science Foundation of China under Grant No.61274027the National Key Laboratory of Analog Integrated Circuit under Grant No.9140c90503140c09048
文摘Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.
