Impacts of hydrogen annealing on the carrier lifetimes in p-type 4H-SiC after thermal oxidation

Thermal oxidation and hydrogen annealing were applied on a 100μm thick Al-doped p-type 4H-Si C epitaxial wafer to modulate the minority carrier lifetime,which was investigated by microwave photoconductive decay(μ-PCD).The minority carrier lifetime decreased after each thermal oxidation.On the contrary,with the hydrogen annealing time increasing to3 hours,the minority carrier lifetime increased from 1.1μs(as-grown)to 3.14μs and then saturated after the annealing time reached 4 hours.The increase of surface roughness from 0.236 nm to 0.316 nm may also be one of the reasons for limiting the further improvement of the minority carrier lifetimes.Moreover,the whole wafer mappings of minority carrier lifetimes before and after hydrogen annealing were measured and discussed.The average minority carrier lifetime was up to 1.94μs and non-uniformity of carrier lifetime reached 38%after 4-hour hydrogen annealing.The increasing minority carrier lifetimes could be attributed to the double mechanisms of excess carbon atoms diffusion caused by selective etching of Si atoms and passivation of deep-level defects by hydrogen atoms.

A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics

A 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor(UMOSFET)with semi-super-junction shiel-ded structure(SS-UMOS)is proposed and compared with conventional trench MOSFET(CT-UMOS)in this work.The advantage of the proposed structure is given by comprehensive study of the mechanism of the local semi-super-junction structure at the bottom of the trench MOSFET.In particular,the influence of the bias condition of the p-pillar at the bottom of the trench on the static and dynamic performances of the device is compared and revealed.The on-resistance of SS-UMOS with grounded(G)and ungrounded(NG)p-pillar is reduced by 52%(G)and 71%(NG)compared to CT-UMOS,respectively.Additionally,gate ox-ide in the GSS-UMOS is fully protected by the p-shield layer as well as semi-super-junction structure under the trench and p-base regions.Thus,a reduced electric-field of 2 MV/cm can be achieved at the corner of the p-shield layer.However,the quasi-intrinsic protective layer cannot be formed in NGSS-UMOS due to the charge storage effect in the floating p-pillar,resulting in a large electric field of 2.7 MV/cm at the gate oxide layer.Moreover,the total switching loss of GSS-UMOS is 1.95 mJ/cm2 and is reduced by 18%compared with CT-UMOS.On the contrary,the NGSS-UMOS has the slowest overall switching speed due to the weakened shielding effect of the p-pillar and the largest gate-to-drain capacitance among the three.The proposed GSS-UMOS plays an important role in high-voltage and high-frequency applications,and will provide a valuable idea for device design and circuit applications.