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Techniques for Design and Implementation of an FPGA-Specific Physical Unclonable Function 被引量:8
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作者 Ji-Liang Zhang Qiang Wu +5 位作者 Yi-Peng Ding yong-qiang lv Qiang Zhou Zhi-Hua Xia Xing-Ming Sun Xing-Wei Wang 《Journal of Computer Science & Technology》 SCIE EI CSCD 2016年第1期124-136,共13页
Physical unclonable function (PUF) makes use of the uncontrollable process variations during the production of IC to generate a unique signature for each IC. It has a wide application in security such as FPGA intell... Physical unclonable function (PUF) makes use of the uncontrollable process variations during the production of IC to generate a unique signature for each IC. It has a wide application in security such as FPGA intellectual property (IP) protection, key generation and digital rights management. Ring oscillator (RO) PUF and Arbiter PUF are the most popular PUFs, but they are not specially designed for FPGA. RO PUF incurs high resource overhead while obtaining less challenge-response pairs, and requires "hard macros" to implement on FPGAs. The arbiter PUF brings low resource overhead, but its structure has big bias when it is mapped on FPGAs. Anderson PUF can address these weaknesses of current Arbiter and RO PUFs implemented on FPGAs. However, it cannot be directly implemented on the new generation 28 nm FPGAs. In order to address these problems, this paper designs and implements a delay-based PUF that uses two LUTs in an SLICEM to implement two 16-bit shift registers of the PUF, 2-to-1 multiplexers in the carry chain to implement the multiplexers of the PUF, and any one of the 8 flip-flops to latch 1-bit PUF signatures. The proposed delay-based PUF is completely realized on 28 nm commercial FPGAs, and the experimental results show its high uniqueness, reliability and reconfigurability. Moreover, we test the impact of aging on it, and the results show that the effect of aging on the proposed PUF is insignificant, with only 6% bit-flips. Finally, the prospects of the proposed PUF in the FPGA binding and volatile key generation are discussed. 展开更多
关键词 physical unclonable function (PUF) FPGA intellectual property protection fabrication variation hardware security
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A Dataflow-Oriented Programming Interface for Named Data Networking 被引量:1
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作者 Li-Jing Wang yong-qiang lv +1 位作者 Ilya Moiseenko Dong-Sheng Wang 《Journal of Computer Science & Technology》 SCIE EI CSCD 2018年第1期158-168,共11页
Inheriting from a data-driven communication pattern other than a location-driven pattern, named data net- working (NDN) offers better support to network-layer dataflow. However, the application developers have to ha... Inheriting from a data-driven communication pattern other than a location-driven pattern, named data net- working (NDN) offers better support to network-layer dataflow. However, the application developers have to handle complex tasks, such as data segmentation, packet verification, and flow control, due to the lack of proper transport-layer protocols over the network layer. In this study, we design a dataflow-oriented programming interface to provide transport strategies for NDN, which greatly improves the efficiency in developing applications. This interface presents two application data unit; (ADU) retrieval strategies according to different data publishing patterns, in which it adopts an adaptive ADU pipelining algorithm to control the dataflow based on the current network status and data generation rate. The interface also offers network measurement strategies to monitor an abundance of critical metrics infuencing the application performance. We verify the functionality and performance of our interface by implementing a video streaming application spanning 11 time zones over the worldwide NDN testbed. Our experiments show that the interface can efficiently support developing high-performance and dataflow-driven NDN applications. 展开更多
关键词 named data networking (NDN) DATAFLOW network architecture and design transport-layer protocol
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