A spiral bacterium(SH9),morphologically different from Helicobacter pylori(H.pylori),was found in a 62-yearold woman’s gastric mucosa.Gastroscopic examination revealed multiple gastric ulcers near the pyloric ring;ma...A spiral bacterium(SH9),morphologically different from Helicobacter pylori(H.pylori),was found in a 62-yearold woman’s gastric mucosa.Gastroscopic examination revealed multiple gastric ulcers near the pyloric ring;mapping gastric biopsy showed mild mononuclear infiltration with large lymphoid follicles in the antrum,without corpus atrophy.Urea breath test and H.pylori culture were negative,but Giemsa staining of biopsies revealed tightly coiled bacteria that immunostained with anti-H.pylori antibody.Sequencing of SH9 16S rRNA and the partial urease A and B subunit genes showed that the former sequence had highest similarity(99%;1302/1315 bp)to Helicobacter heilmannii(H.heilmannii)sensu stricto(H.heilmannii s.s.)BC1 obtained from a bobcat,while the latter sequence confirmed highest similarity(98.3%;1467/1493 bp)to H.heilmannii s.s.HU2 obtained from a human.The patient was diagnosed with multiple gastric ulcers associated with H.heilmannii s.s.infection.After triple therapy(amoxicillin,clarithromycin,and lansoprazole)with regimen for eradicating H.pylori,gastroscopy showed ulcer improvement and no H.heilmannii s.s.upon biopsy.展开更多
With the recent advances of the VLSI technologies, stabilizing the physical behavior of VLSI chips is becoming a very complicated problem. Power grid optimization is required to minimize the risks of timing error by I...With the recent advances of the VLSI technologies, stabilizing the physical behavior of VLSI chips is becoming a very complicated problem. Power grid optimization is required to minimize the risks of timing error by IR drop, defects by electro migration (EM), and manufacturing cost by the chip size. This problem includes complicated tradeoff relationships. We propose a new approach by observing the direct objectives of manufacturing cost, and timing error risk caused by IR drop and EM. The manufacturing cost is based on yield for LSI chip. The optimization is executed in early phase of the physical design, and the purpose is to find the rough budget of decoupling capacitors that may cause block size increase. Rough budgeting of the power wire width is also determined simultaneously. The experimental result shows that our approach enables selection of a cost sensitive result or a performance sensitive result in early physical design phase.展开更多
基金Supported by A Grant-in-Aid for Scientific Research C-20590564 from the Ministry of Education,Culture,Sports,Science and Technology,Japan,to Ota H
文摘A spiral bacterium(SH9),morphologically different from Helicobacter pylori(H.pylori),was found in a 62-yearold woman’s gastric mucosa.Gastroscopic examination revealed multiple gastric ulcers near the pyloric ring;mapping gastric biopsy showed mild mononuclear infiltration with large lymphoid follicles in the antrum,without corpus atrophy.Urea breath test and H.pylori culture were negative,but Giemsa staining of biopsies revealed tightly coiled bacteria that immunostained with anti-H.pylori antibody.Sequencing of SH9 16S rRNA and the partial urease A and B subunit genes showed that the former sequence had highest similarity(99%;1302/1315 bp)to Helicobacter heilmannii(H.heilmannii)sensu stricto(H.heilmannii s.s.)BC1 obtained from a bobcat,while the latter sequence confirmed highest similarity(98.3%;1467/1493 bp)to H.heilmannii s.s.HU2 obtained from a human.The patient was diagnosed with multiple gastric ulcers associated with H.heilmannii s.s.infection.After triple therapy(amoxicillin,clarithromycin,and lansoprazole)with regimen for eradicating H.pylori,gastroscopy showed ulcer improvement and no H.heilmannii s.s.upon biopsy.
文摘With the recent advances of the VLSI technologies, stabilizing the physical behavior of VLSI chips is becoming a very complicated problem. Power grid optimization is required to minimize the risks of timing error by IR drop, defects by electro migration (EM), and manufacturing cost by the chip size. This problem includes complicated tradeoff relationships. We propose a new approach by observing the direct objectives of manufacturing cost, and timing error risk caused by IR drop and EM. The manufacturing cost is based on yield for LSI chip. The optimization is executed in early phase of the physical design, and the purpose is to find the rough budget of decoupling capacitors that may cause block size increase. Rough budgeting of the power wire width is also determined simultaneously. The experimental result shows that our approach enables selection of a cost sensitive result or a performance sensitive result in early physical design phase.
