K-Ar dating of synkinematic illite is increasingly recognized as a central method to constrain the timing of shallow crustal faulting.Methods of efficient sample preparation and quantitative identification of illite p...K-Ar dating of synkinematic illite is increasingly recognized as a central method to constrain the timing of shallow crustal faulting.Methods of efficient sample preparation and quantitative identification of illite polytypes are critical to acquiring K-Ar isotope data for authigenic clays.In this respect,we compared the commonly used clay size separation method through centrifugation with vacuum filtration technology,showing that the former is prone to extract fractions with finer particle sizes under similar conditions,thus improving the error in the authigenic end-member age.Additionally,we demonstrated that the side-packed mounting method for X-ray diffraction analysis can significantly enhance the randomness in powder samples,thus improving the quantification accuracy compared with the front-packed and back-packed methods.The validity of our quantification method was confirmed by comparing Profex■modeling patterns with a suite of synthetic mixtures of known compositions,yielding an average analytical error of 3%.Dating results of these artificial mixtures and the reference materials indicated that a large range in percentages of detrital illite and a sufficient amount of age data will produce reliable results for ages of both extrapolated end-members.However,if the range is limited,the extrapolated age close to those of datasets is still reliable.展开更多
In this work single event upset(SEU) sensitivity of 45 nm fully depleted silicon-on-insulator(FDSOI) static random access memory(SRAM) cell and that of SOI fin-shaped field-effect-transistor(FinFET) SRAM cell have bee...In this work single event upset(SEU) sensitivity of 45 nm fully depleted silicon-on-insulator(FDSOI) static random access memory(SRAM) cell and that of SOI fin-shaped field-effect-transistor(FinFET) SRAM cell have been investigated by 3D TCAD simulations.The critical charges and SEU threshold linear energy transfer(LET) value of the two SRAM cells are consistent due to similar gate capacitance.The low electrical field and the high recombination rate account for the non-sensitivity to SEU in heavily doped drain region.Compared with FDSOI SRAM,SOI FinFET SRAM cell exhibits lower SEU sensitivity at the center of the gate.The smaller sensitive area in SOI FinFET SRAM cell may result in a smaller SEU saturation cross section than that of SOI FinFET SRAM.展开更多
As feature size scales down, reliability issues like single event upset(SEU) have become serious for circuit and system designers, especially for those who work on memory and latch designs. In this paper, an improved ...As feature size scales down, reliability issues like single event upset(SEU) have become serious for circuit and system designers, especially for those who work on memory and latch designs. In this paper, an improved SEU tolerant data cell design based on the Quatro-10 T cell is proposed. The introduced cell enhances the capability of SEU tolerance by weakening the key transistors in the feedback loop to block the effects of transient fault. Simulation results show that our proposed design achieves obvious higher resilience to SEU and better performance on speed and power dissipation at the expense of an increased area. The proposed cell is a fully SEU immune design with an amount of critical charge at least 7 times more than the Quatro-10 T cell and has the lowest Power Delay Product. It shows that our design is very suitable in high-performance circuit and system design.展开更多
基金funded by the National Natural Science Foundation of China(Nos.42072240 and 41602218)Key Special Project for Introduced Talents Team of Southern Marine Science and Engineering Guangdong Laboratory(No.GML2019ZD0201)the Fund from the Key Laboratory of Deep-Earth Dynamics of Ministry of Natural Resources,Chinese Academy of Geological Sciences(Nos.J1901-30 and J1908)。
文摘K-Ar dating of synkinematic illite is increasingly recognized as a central method to constrain the timing of shallow crustal faulting.Methods of efficient sample preparation and quantitative identification of illite polytypes are critical to acquiring K-Ar isotope data for authigenic clays.In this respect,we compared the commonly used clay size separation method through centrifugation with vacuum filtration technology,showing that the former is prone to extract fractions with finer particle sizes under similar conditions,thus improving the error in the authigenic end-member age.Additionally,we demonstrated that the side-packed mounting method for X-ray diffraction analysis can significantly enhance the randomness in powder samples,thus improving the quantification accuracy compared with the front-packed and back-packed methods.The validity of our quantification method was confirmed by comparing Profex■modeling patterns with a suite of synthetic mixtures of known compositions,yielding an average analytical error of 3%.Dating results of these artificial mixtures and the reference materials indicated that a large range in percentages of detrital illite and a sufficient amount of age data will produce reliable results for ages of both extrapolated end-members.However,if the range is limited,the extrapolated age close to those of datasets is still reliable.
基金supported by the National Natural Science Foundation of China (Grant No. 11175138)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20100201110018)the Key Program of the National Natural Science Foundation of China (Grant No. 11235008)
文摘In this work single event upset(SEU) sensitivity of 45 nm fully depleted silicon-on-insulator(FDSOI) static random access memory(SRAM) cell and that of SOI fin-shaped field-effect-transistor(FinFET) SRAM cell have been investigated by 3D TCAD simulations.The critical charges and SEU threshold linear energy transfer(LET) value of the two SRAM cells are consistent due to similar gate capacitance.The low electrical field and the high recombination rate account for the non-sensitivity to SEU in heavily doped drain region.Compared with FDSOI SRAM,SOI FinFET SRAM cell exhibits lower SEU sensitivity at the center of the gate.The smaller sensitive area in SOI FinFET SRAM cell may result in a smaller SEU saturation cross section than that of SOI FinFET SRAM.
基金supported by the Fundamental Research Funds for the Central Universitiesthe National Natural Science Foundation of China for the Youth(Grant No.61306111)
文摘As feature size scales down, reliability issues like single event upset(SEU) have become serious for circuit and system designers, especially for those who work on memory and latch designs. In this paper, an improved SEU tolerant data cell design based on the Quatro-10 T cell is proposed. The introduced cell enhances the capability of SEU tolerance by weakening the key transistors in the feedback loop to block the effects of transient fault. Simulation results show that our proposed design achieves obvious higher resilience to SEU and better performance on speed and power dissipation at the expense of an increased area. The proposed cell is a fully SEU immune design with an amount of critical charge at least 7 times more than the Quatro-10 T cell and has the lowest Power Delay Product. It shows that our design is very suitable in high-performance circuit and system design.
