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A modification of local path marginal cost on the dynamic traffic network 被引量:1
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作者 zhengfeng huang Gang Ren +1 位作者 Lili Lu Yang Cheng 《Journal of Modern Transportation》 2014年第1期12-19,共8页
Path marginal cost (PMC) is the change in totaltravel cost for flow on the network that arises when timedependentpath flow changes by 1 unit. Because it is hardto obtain the marginal cost on all the links, the local... Path marginal cost (PMC) is the change in totaltravel cost for flow on the network that arises when timedependentpath flow changes by 1 unit. Because it is hardto obtain the marginal cost on all the links, the local PMC,considering marginal cost of partial links, is normallycalculated to approximate the global PMC. When analyzingthe marginal cost at a congested diverge intersection, ajump-point phenomenon may occur. It manifests as alikelihood that a vehicle may unsteadily lift up (down) inthe cumulative flow curve of the downstream links. Previously,the jump-point caused delay was ignored whencalculating the local PMC. This article proposes an analyticalmethod to solve this delay which can contribute toobtaining a more accurate local PMC. Next to that, we usea simple case to calculate the previously local PMC and themodified one. The test shows a large gap between them,which means that this delay should not be omitted in thelocal PMC calculation. 展开更多
关键词 Transportation network Path marginal cost Cumulative flow curve Dynamic traffic Systemoptimization
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A novel BIST scheme for circuit aging measurement of aerospace chips 被引量:3
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作者 Huaguo LIANG Xiangsheng FANG +2 位作者 Maoxiang YI zhengfeng huang Yingchun LU 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2018年第7期1594-1601,共8页
The avionics working environment is bad, easy to accelerate aging of circuits. Circuit aging is one of the important factors that influence the reliability of avionics, so circuit aging testing is of great significanc... The avionics working environment is bad, easy to accelerate aging of circuits. Circuit aging is one of the important factors that influence the reliability of avionics, so circuit aging testing is of great significance to improve the reliability of avionics. As continuing aging would degrade circuit performance, aging can be monitored through precise measurement of performance degradation. However, previous methods for predicting circuit performance have limited prediction accuracy. In this paper, we propose a novel Built-In Self-Test(BIST) scheme for circuit aging measurement, which constructs self-oscillation loops employing parts of critical paths and activates oscillations by specific test patterns. An aging signature counter is then used to capture the oscillation frequency and in turn measure the aging state of the circuit. We propose to implement this measurement process by BIST. Experimental results show that the proposed in-field aging measurement is robust with respect to process variations and can achieve a precision of about 90%. The application of this scheme has a certain value to improve the reliability of avionics systems. 展开更多
关键词 Aging measurement AVIONICS BIST Critical path Self-oscillation loops
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Anti-Interference Low-Power Double-Edge Triggered Flip-Flop Based on C-Elements
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作者 zhengfeng huang Xiao Yang +4 位作者 Tai Song Haochen Qi Yiming Ouyang Tianming Ni Qi Xu 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2022年第1期1-12,共12页
When the input signal has been interfered and glitches occur,the power consumption of Double-Edge Triggered Flip-Flops(DETFFs)will significantly increase.To effectively reduce the power consumption,this paper presents... When the input signal has been interfered and glitches occur,the power consumption of Double-Edge Triggered Flip-Flops(DETFFs)will significantly increase.To effectively reduce the power consumption,this paper presents an anti-interference low-power DETFF based on C-elements.The improved C-element is used in this DETFF,which effectively blocks the glitches in the input signal,prevents redundant transitions inside the DETFF,and reduces the charge and discharge frequencies of the transistor.The C-element has also added pull-up and pull-down paths,reducing its latency.Compared with other existing DETFFs,the DETFF proposed in this paper only flips once on the clock edge,which greatly reduces the redundant transitions caused by glitches and effectively reduces power consumption.This paper uses HSPICE to simulate the proposed DETFF and other 10 DETFFs.The findings show that compared with the other 10 types of DETFFs,the proposed DETFF has achieved large performance indexes in the total power consumption,total power consumption with glitches,delays,and power delay product.A detailed analysis of variance indicates that the proposed DETFF features less sensitivity to process,voltage,temperature,and Negative Bias Temperature Instability(NBTI)-induced aging variations. 展开更多
关键词 Double-Edge Triggered Flip-Flop(DETFF) glitch LOW-POWER C-element
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Analysis of Effectiveness on Monte Carlo Importance Biased Transport Calculation
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作者 Haiyan Xu zhengfeng huang Shaohui Cai 《Communications in Computational Physics》 SCIE 2010年第9期866-876,共11页
To obtain fine distributing calculation about the time,space and energy of neutron flux for a kind of non-stationary particle transport problem,the scheme of global Monte Carlo variance reduction is developed.In order... To obtain fine distributing calculation about the time,space and energy of neutron flux for a kind of non-stationary particle transport problem,the scheme of global Monte Carlo variance reduction is developed.In order to provide the foundation for this scheme,it is necessary to analyze its effectiveness before putting it to use.This paper fulfills this through analyzing the effectiveness of its core which is Monte Carlo transport importance biased calculation.By decomposing the arithmetic and calculating the representative objectives,the effectiveness of the Monte Carlo transport importance biased calculation is demonstrated. 展开更多
关键词 Monte Carlo importance biased transport direct bias indirect bias
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