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Impact of STI indium implantation on reliability of gate oxide
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作者 Xiao-Liang Chen Tian Chen +3 位作者 Wei-Feng Sun zhong-jian qian Yu-Dai Li Xing-Cheng Jin 《Chinese Physics B》 SCIE EI CAS CSCD 2022年第2期671-676,共6页
The impacts of shallow trench isolation(STI)indium implantation on gate oxide and device characteristics are studied in this work.The stress modulation effect is confirmed in this research work.An enhanced gate oxide ... The impacts of shallow trench isolation(STI)indium implantation on gate oxide and device characteristics are studied in this work.The stress modulation effect is confirmed in this research work.An enhanced gate oxide oxidation rate is observed due to the enhanced tensile stress,and the thickness gap is around 5%.Wafers with and without STI indium implantation are manufactured using the 150-nm silicon on insulator(SOI)process.The ramped voltage stress and time to breakdown capability of the gate oxide are researched.No early failure is observed for both wafers the first time the voltage is ramped up.However,a time dependent dielectric breakdown(TDDB)test shows more obvious evidence that the gate oxide quality is weakened by the STI indium implantation.Meanwhile,the device characteristics are compared,and the difference between two devices is consistent with the equivalent oxide thickness(EOT)gap. 展开更多
关键词 SILICON-ON-INSULATOR shallow trench isolation(STI)implantation gate oxide reliability
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