Massive multiple-input multiple-output provides improved energy efficiency and spectral efficiency in 5 G. However it requires large-scale matrix computation with tremendous complexity, especially for data detection a...Massive multiple-input multiple-output provides improved energy efficiency and spectral efficiency in 5 G. However it requires large-scale matrix computation with tremendous complexity, especially for data detection and precoding. Recently, many detection and precoding methods were proposed using approximate iteration methods, which meet the demand of precision with low complexity. In this paper, we compare these approximate iteration methods in precision and complexity, and then improve these methods with iteration refinement at the cost of little complexity and no extra hardware resource. By derivation, our proposal is a combination of three approximate iteration methods in essence and provides remarkable precision improvement on desired vectors. The results show that our proposal provides 27%-83% normalized mean-squared error improvement of the detection symbol vector and precoding symbol vector. Moreover, we find the bit-error rate is mainly controlled by soft-input soft-output Viterbi decoding when using approximate iteration methods. Further, only considering the effect on soft-input soft-output Viterbi decoding, the simulation results show that using a rough estimation for the filter matrix of minimum mean square error detection to calculating log-likelihood ratio could provideenough good bit-error rate performance, especially when the ratio of base station antennas number and the users number is not too large.展开更多
With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory po...With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory power consumption will significantly reduce the overall power consumption of the chip;according to ISSCC’s 2014 report about technology trends discussions, there two points of the super-low power SRAM design: 1) design a more effective static and dynamic power control circuit for each key module of SRAM;2) ensure that in the case of the very low VDD min, SRAM can operating reliably and stably. This paper makes full use reliable of 8T cell, and the single-port sense amplifier has solved problems in the traditional 8T cell structure, making the new structure of the memory at a greater depth still maintain good performance and lower power consumption. Compared with the designed SRAM the SRAM generated by commercial compiler, as the performance loss at SS corner does not exceed 10%, the whole power consumption could be reduced by 54.2%, which can achieve a very good effect of low-power design.展开更多
文摘Massive multiple-input multiple-output provides improved energy efficiency and spectral efficiency in 5 G. However it requires large-scale matrix computation with tremendous complexity, especially for data detection and precoding. Recently, many detection and precoding methods were proposed using approximate iteration methods, which meet the demand of precision with low complexity. In this paper, we compare these approximate iteration methods in precision and complexity, and then improve these methods with iteration refinement at the cost of little complexity and no extra hardware resource. By derivation, our proposal is a combination of three approximate iteration methods in essence and provides remarkable precision improvement on desired vectors. The results show that our proposal provides 27%-83% normalized mean-squared error improvement of the detection symbol vector and precoding symbol vector. Moreover, we find the bit-error rate is mainly controlled by soft-input soft-output Viterbi decoding when using approximate iteration methods. Further, only considering the effect on soft-input soft-output Viterbi decoding, the simulation results show that using a rough estimation for the filter matrix of minimum mean square error detection to calculating log-likelihood ratio could provideenough good bit-error rate performance, especially when the ratio of base station antennas number and the users number is not too large.
文摘With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory power consumption will significantly reduce the overall power consumption of the chip;according to ISSCC’s 2014 report about technology trends discussions, there two points of the super-low power SRAM design: 1) design a more effective static and dynamic power control circuit for each key module of SRAM;2) ensure that in the case of the very low VDD min, SRAM can operating reliably and stably. This paper makes full use reliable of 8T cell, and the single-port sense amplifier has solved problems in the traditional 8T cell structure, making the new structure of the memory at a greater depth still maintain good performance and lower power consumption. Compared with the designed SRAM the SRAM generated by commercial compiler, as the performance loss at SS corner does not exceed 10%, the whole power consumption could be reduced by 54.2%, which can achieve a very good effect of low-power design.
