Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid developme...Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.展开更多
With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insul...With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insulated gate bipolar transistors(IGBTs). By modulating the density and width of the pulse trains, without regulating the hardware circuit, the slope of the gate driving voltage is controlled to change the switching speed. This technique is used in the driving circuit based on complex programmable logic devices(CPLDs), and the switching voltage spike of IGBTs can be restrained through software, which is easier and more flexible to adjust. Experimental results demonstrate the effectiveness and practicability of the proposed method.展开更多
In this paper, we present an optimized design method for high-speed embedded image processing system using 32 bit floating-point Digital Signal Processor (DSP) and Complex Programmable Logic Device (CPLD). The DSP...In this paper, we present an optimized design method for high-speed embedded image processing system using 32 bit floating-point Digital Signal Processor (DSP) and Complex Programmable Logic Device (CPLD). The DSP acts as the main processor of the system: executes digital image processing algorithms and operates other devices such as image sensor and CPLD. The CPLD is used to acquire images and achieve complex logic control of the whole system. Some key technologies are introduced to enhance the performance of our system. In particular, the use of DSP/BIOS tool to develop DSP applications makes our program run much more efficiently. As a result, this system can provide an excellent computing platform not only for executing complex image processing algorithms, but also for other digital signal processing or multi-channel data collection by choosing different sensors or Analog-to-Digital (A/D) converters.展开更多
High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the impleme...High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the implementation of MPC controller on field programmable gate array(FPGA) system is studied.For the dynamic matrix control(DMC) algorithm,the main design idea and the implemental strategy of DMC controller are introduced based on a FPGA’s embedded system.The performance tests show that both the computation efficiency and the accuracy of the proposed controller can be satisfied due to the parallel computing capability of FPGA.展开更多
基金Supported by National Natural Science Foundation of China(No.61271149)National High Technology Research and Development Program of China(No.2012AA-012301)National Science and Technology Major Project of China(No.2013ZX03006004)
文摘Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.
基金Project supported by the National Natural Science Foundation of China(No.51177147)the Zhejiang Key Science and Technology Innovation Group Program,China(No.2010R50021)
文摘With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insulated gate bipolar transistors(IGBTs). By modulating the density and width of the pulse trains, without regulating the hardware circuit, the slope of the gate driving voltage is controlled to change the switching speed. This technique is used in the driving circuit based on complex programmable logic devices(CPLDs), and the switching voltage spike of IGBTs can be restrained through software, which is easier and more flexible to adjust. Experimental results demonstrate the effectiveness and practicability of the proposed method.
基金Supported by the National Natural Science Foundation of China (No.60472046)
文摘In this paper, we present an optimized design method for high-speed embedded image processing system using 32 bit floating-point Digital Signal Processor (DSP) and Complex Programmable Logic Device (CPLD). The DSP acts as the main processor of the system: executes digital image processing algorithms and operates other devices such as image sensor and CPLD. The CPLD is used to acquire images and achieve complex logic control of the whole system. Some key technologies are introduced to enhance the performance of our system. In particular, the use of DSP/BIOS tool to develop DSP applications makes our program run much more efficiently. As a result, this system can provide an excellent computing platform not only for executing complex image processing algorithms, but also for other digital signal processing or multi-channel data collection by choosing different sensors or Analog-to-Digital (A/D) converters.
基金the National Science Foundation of China(Nos.60934007 and 61074060)the Postdoctoral Science Foundation of China(No.20090460627)+2 种基金the Postdoctoral Scientific Program of Shanghai (No.10R21414600)the Specialized Research Fund for the Doctoral Program of Higher Education (No.20070248004)the China Postdoctoral Science Foundation Special Support(No.201003272)
文摘High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the implementation of MPC controller on field programmable gate array(FPGA) system is studied.For the dynamic matrix control(DMC) algorithm,the main design idea and the implemental strategy of DMC controller are introduced based on a FPGA’s embedded system.The performance tests show that both the computation efficiency and the accuracy of the proposed controller can be satisfied due to the parallel computing capability of FPGA.