A New Method for Optimizing Layout Parameter ofan Integrated On-Chip Inductor in CMOSRF IC's

Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter. Using this method, the Q factor of 7.9 can be achieved in a 5nH inductor (operating frequency is 2GHz) while the errors in inductance are less than 0.5% compared with the aimed values. It is proved by experiments that this method can guarantee the sufficient accuracy but require less computation time. Therefore, it is of great use for the design of the inductor in CMOS RF IC’s.

CMOS数字IC三态输出管脚漏电路径分析

本文从双电源电压三态输出电路原理结构图出发,列出了引起VOL、VOH、IOZH、IOZL失效的可能原因,通过估算指出引起高阻高电平漏电失效而其它功能参数都正常的失效模式的失效位置为输出NMOS管的驱动级的PMOS管漏电所致。

A Novel Charge-Transfer Matching Cell for High-Precision Correlation and Low-Power

A novel matching cell circuitry using charge transfer circuit technique for high precision correlation calculation is presented.The cell calculates the absolute value of the difference between two analog input voltages and amplifies the result.Amplification gain can be designed by the capacitance size in the cell and threshold voltage mismatch can be canceled automatically,thus high precision operation of the circuit is achieved.The circuit can be operated with low power dissipation of about 12μW at a frequency of 50MHz.Because of its simple structure and small silicon area,the matching cell is suitable to realize the correlation dealing with many template vectors that have many elements in a chip.

Study of radiation-induced leakage current between adjacent devices in a CMOS integrated circuit

Radiation-induced inter-device leakage is studied using an analytical model and TCAD simulation. There were some different opinions in understanding the process of defect build-up in trench oxide and parasitic leakage path turning on from earlier studies.To reanalyze this problem and make it beyond argument,every possible variable is considered using theoretical analysis,not just the change of electric field or oxide thickness independently. Among all possible inter-device leakage paths,parasitic structures with N-well as both drain and source are comparatively more sensitive to the total dose effect when a voltage discrepancy exists between the drain and source region.Since N-well regions are commonly connected to the same power supply,these kinds of structures will not be a problem in a real CMOS integrated circuit.Generally speaking,conduction paths of inter-device leakage existing in a real integrated circuit and under real electrical circumstances are not very sensitive to the total ionizing dose effect.

Double junction photodiode for X-ray CMOS sensor IC

A CMOS compatible P＋/Nwell/Psub double junction photodiode pixel was proposed, which can effi- ciently detect fluorescence from CsI（T1） scintillation in an X-ray sensor. Photoelectric and spectral responses of P＋/Nwell, NweE1/Psub and P＋/Nwell/Psub photodiodes were analyzed and modeled. Simulation results show P＋/Nweu/Psub photodiode has larger photocurrent than P＋/Nwetl photodiode and Nweu/Psub photodiode, and its spectral response is more in accordance with CsI（T1） fluorescence spectrum. Improved P＋/Nweu/Psub photodiode detecting CsI（T1） fluorescence was designed in CSMC 0.5 #m CMOS process, CTIA （capacitive transimpedance amplifier） architecture was used to readout photocurrent signal. CMOS X-ray sensor IC prototype contains 8 × 8 pixel array and pixel pitch is 100 × 100 μm2. Testing results show the dark current of the improved P＋/Nwell/Psub photodiode （6.5 pA） is less than that of P＋/Nwell and P＋/Nwell/Psub photodiodes （13 pA and 11 pA respectively）. The sen- sitivity of P＋/Nwell/Psub photodiode is about 20 pA/lux under white LED. The spectrum response of P＋/Nwell/Psub photodiode ranges from 400 nm to 800 nm with a peak at 532 nm, which is in accordance with the fluorescence spectrum of Csl（T1） in an indirect X-ray sensor. Preliminary testing results show the sensitivity of X-ray sensor IC under Cu target X-ray is about 0.21 V.m^2/W or 5097e-/pixel @ 8.05 keV considering the pixel size, integration time and average energy of X-ray photons.

A 5.4mW Low-Noise High-Gain CMOS RF Front-End Circuit for Portable GPS Receivers

This paper describes a CMOS low noise amplifier （LNA） plus the quadrature mixers intended for use in the front-end of portable global positioning system （GPS） receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gil- bert cell type. The circuits are implemented in a TSMC 0.18μm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise and an input return loss of - 22.3dB. The fully differential figure of 2.4dB,an input ldB compression point of - 22dBm, circuits only draw 5.4mW from a 1.8V supply.

A Ka-band wide locking range frequency divider with high injection sensitivity

This paper proposes a direct injection-locked frequency divider（ILFD） with a wide locking range in the Ka-band. A complementary cross-coupled architecture is used to enhance the overdriving voltage of the switch transistor so that the divider locking range is extended efficiently. New insights into the locking range and output power are proposed. A new method to analyze and optimize the injection sensitivity is presented and a layout technique to reduce the parasitics of the cross-coupled transistors is applied to decrease the frequency shift and the locking range degradation. The circuit is designed in a standard 90-nm CMOS process. The total locking range of the ILFD is 43.8% at 34.5 GHz with an incident power of –3.5 dBm. The divider IC consumes 3.6 mW of power at the supply voltage of 1.2 V. The chip area including the pads is 0.50.5 mm2.