Power Prediction of VLSI Circuits Using Machine Learning

The difference between circuit design stage and time requirements has broadened with the increasing complexity of the circuit.A big database is needed to undertake important analytical work like statistical method,heat research,and IR-drop research that results in extended running times.This unit focuses on the assessment of test strength.Because of the enormous number of successful designs for currentmodels and the unnecessary time required for every test,maximum energy ratings with all tests cannot be achieved.Nevertheless,test safety is important for producing trustworthy findings to avoid loss of output and harm to the chip.Generally,effective power assessment is only possible in a limited sample of pre-selected experiments.Thus,a key objective is to find the experiments that might give the worst situations again for testing power.It offers a machine-based circuit power estimation(MLCPE)system for the selection of exams.Two distinct techniques of predicting are utilized.Firstly,to find testings with power dissipation,it forecasts the behavior of testing.Secondly,the changemovement and energy data are linked to the semiconductor design,identifying small problem areas.Several types of algorithms are utilized.In particular,the methods compared.The findings show great accuracy and efficiency in forecasting.That enables such methods suitable for selecting the worst scenario.

Method of simulating hybrid STT-MTJ/CMOS circuits based on MATLAB/Simulink

The spin-transfer-torque(STT)magnetic tunneling junction(MTJ)device is one of the prominent candidates for spintronic logic circuit and neuromorphic computing.Therefore,building a simulation framework of hybrid STT-MTJ/CMOS(complementary metal-oxide-semiconductor)circuits is of great value for designing a new kind of computing paradigm based on the spintronic devices.In this work,we develop a simulation framework of hybrid STT-MTJ/CMOS circuits based on MATLAB/Simulink,which is mainly composed of a physics-based STT-MTJ model,a controlled resistor,and a current sensor.In the proposed framework,the STT-MTJ model,based on the Landau-Lifshitz-Gilbert-Slonczewsk(LLGS)equation,is implemented using the MATLAB script.The proposed simulation framework is modularized design,with the advantage of simple-to-use and easy-to-expand.To prove the effectiveness of the proposed framework,the STT-MTJ model is benchmarked with experimental results.Furthermore,the pre-charge sense amplifier(PCSA)circuit consisting of two STT-MTJ devices is validated and the electrical coupling of two spin-torque oscillators is simulated.The results demonstrate the effectiveness of our simulation framework.

Fast Analysis of Power/Ground Networks via Circuit Reduction

This paper presents an efficient algorithm for reducing RLC power/ground network complexities by exploitation of the regularities in the power/ground networks. The new method first builds the equivalent models for many series RLC-current chains based on their Norton＇s form companion models in the original networks,and then the precondition conjugate gradient based iterative method is used to solve the reduced networks,which are symmetric positive definite. The solutions of the original networks are then back solved from those of the reduced networks.Experimental results show that the complexities of reduced networks are typically significantly smaller than those of the original circuits, which makes the new algorithm extremely fast. For instance, power/ground networks with more than one million branches can be solved in a few minutes on modern Sun workstations.

Realization of fractional-order Liu chaotic system by circuit

In this paper, chaotic behaviours in the fractional-order Liu system are studied. Based on the approximation theory of fractional-order operator, circuits are designed to simulate the fractional- order Liu system with q=0.1 - 0.9 in a step of 0.1, and an experiment has demonstrated the 2.7-order Liu system. The simulation results prove that the chaos exists indeed in the fractional-order Liu system with an order as low as 0.3. The experimental results prove that the fractional-order chaotic system can be realized by using hardware devices, which lays the foundation for its practical applications.

Chaos in fractional-order generalized Lorenz system and its synchronization circuit simulation

The chaotic behaviours of a fractional-order generalized Lorenz system and its synchronization are studied in this paper. A new electronic circuit unit to realize fractional-order operator is proposed. According to the circuit unit, an electronic circuit is designed to realize a 3.8-order generalized Lorenz chaotic system. Furthermore, synchronization between two fractional-order systems is achieved by utilizing a single-variable feedback method. Circuit experiment simulation results verify the effectiveness of the proposed scheme.

Realization of fractional-order Liu chaotic system by a new circuit unit

A new circuit unit for the analysis and the synthesis of the chaotic behaviours in a fractional-order Liu system is proposed in this paper. Based on the approximation theory of fractional-order operator, an electronic circuit is designed to describe the dynamic behaviours of the fractional-order Liu system with α = 0.9. The results between simulation and experiment are in good agreement with each other, thereby proving that the chaos exists indeed in the fractional-order Liu system.

Dynamical analysis and circuit simulation of a new three-dimensional chaotic system

This paper reports a new three-dimensional autonomous chaotic system. It contains six control parameters and three nonlinear terms. Two cross-product terms are respectively in two equations. And one square term is in the third equation. Basic dynamic properties of the new system are investigated by means of theoretical analysis, numerical simulation, sensitivity to initial, power spectrum, Lyapunov exponent, and Poincar~ diagrams. The dynamic properties affected by variable parameters are also analysed. Finally, the chaotic system is simulated by circuit. The results verify the existence and implementation of the system.

APPLICATION OF CIRCUIT SIMULATION IN HARDWARE DESIGN FOR ELECTRONIC CONTROL HIGH PRESSURE COMMON-RAIL FUEL SYSTEM OF DIESEL ENGINE

By means of circuit simulation, hardware of electronic control unit （ECU） of high pressure common-rail electronic control fuel system for diesel engine is designed. According to the system requirements for hardware of ECU, signal-processing circuit of variable reluctance （VR） sensor, filter circuit for input signal, high voltage power circuit and driver and protection circuit of solenoid are simulated as emphases. Difficulties of wide scope of VR sensor output signal, efficiency of high voltage power and reliable and swift driver of solenoid are solved. The results of simulation show that the hardware meets the requirement of the fuel system. At the same time, circuit simulation can greatly increase quality of the design, alleviate design labor and shorten design time.

Hierarchical Symbolic Analysis of Large Analog Circuits with Totally Coded Method

Symbolic analysis has many applications in the design of analog circuits. Existing approaches rely on two forms of symbolic-expression representation: expanded sum-of-product form and arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit. Nested form is neither canonical nor amenable to symbolic manipulation. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. This algorithm, called totally coded method (TCM), consists of representing the symbolic determinant of a circuit matrix by code series and performing symbolic analysis by code manipulation. We describe an efficient code-ordering heuristic and prove that it is optimum for ladder-structured circuits. For practical analog circuits, TCM not only covers all advantages of the algorithm via determinant decision diagrams (DDD) but is more simple and efficient than DDD method.

Design of Multi-Valued Logic Circuit Using Carbon Nano Tube Field Transistors

The design of a three-input logic circuit using carbon nanotube field effect transistors(CNTFETs)is presented.Ternary logic must be an exact replacement for dual logic since it performs straightforwardly in digital devices,which is why this design is so popular,and it also reduces chip area,both of which are examples of circuit overheads.The proposed module we have investigated is a triple-logic-based one,based on advanced technology CNTFETs and an emphasis on minimizing delay times at various values,as well as comparisons of the design working with various load capacitances.Comparing the proposed design with the existing design,the delay times was reduced from 66.32 to 16.41 ps,i.e.,a 75.26%reduction.However,the power dissipation was not optimized,and increased by 1.44%compared to the existing adder.The number of transistors was also reduced,and the product of power and delay(P∗D)achieved a value of 0.0498053 fJ.An improvement at 1 V was also achieved.A load capacitance(fF)was measured at different values,and the average delay measured for different values of capacitance had a maximum of 83.60 ps and a minimum of 22.54 ps,with a range of 61.06 ps.The power dissipations ranged from a minimum of 3.38μW to a maximum of 6.49μW.Based on these results,the use of this CNTFET half-adder design in multiple Boolean circuits will be a useful addition to circuit design.

Design and Analysing the Various Parameters of CMOS Circuit’s under Bi-Triggering Method Using Cadence Tools

Reducing the power and energy required by the device/circuit to operate is the main aim of this paper. Here the new design is implemented to reduce the power consumption of the device using the triggering pulses. The proposed triggering method uses a complementary MOS transistor (pMOS and nMOS) as a voltage divider and ground leakage suppressor (i.e.);these designs are named as Trig01 and Trig10 designs. In Trig01 design the pair of CMOS is placed in the voltage divider part;similarly in Trig10 design the pair of CMOS is placed at the ground leakage suppressor part. Standard CMOS gates like NOT, NAND, NOR, EX-OR etc. are designed with these technologies and these gates are designed with 180 nm technology file in the cadence tool suite;compared to the normal CMOS gates, the Bi-Trig gate contains 4 inputs and 2 outputs. The two extra inputs are used as Bi-Trig control signaling inputs. There are 2 control inputs and thus 22 = 4 combination of controlling is done (i.e.);both pMOS and nMOS are ON, both pMOS and nMOS are OFF, pMOS ON and nMOS OFF and pMOS ON and nMOS ON. Depending on the usage of the circuit, the mode of operation is switched to any one of the combination. If the output of the circuit is not used anywhere in the total block, that specified circuit can be switched into idle mode by means of switched OFF both the pMOS and nMOS transistor in the control unit. This reduces the leakage current and also the power wastage of the circuits in the total block. Bi-Trig controlled circuit reduces the power consumption and leakage power of the circuit without affecting a performance of the circuits.

FE Method of Analysing Detecting Electrode of Capacitance Proximity Fuze

The finite element method is first introduced into the design process of detecting electrodes of three electrode capacitance fuze, the mutual capacitance of the fuze and target is calculated by the finite element method, which provides the parameters for simulation circuit and design of detecting electrode. The finite element method pierces the traditional method of designing detecting electrode-design, test and adjustment. The system capacitance can be calculated accurately and the performance can be predicted in the design period of the detecting electrode, which saves a lot of research fee. The capacitances of a mortar shell fuze above ground 2 m and lower are given. After putting the computing data into simulating circuit, the demodulation voltage can be obtained, its changing trend is in agreement with the tested result.

SPICE model of trench-gate MOSFET device

A novel simulation program with an integrated circuit emphasis（SPICE） model developed for trench-gate metal-oxide-semiconductor field-effect transistor（M OSFET）devices is proposed. The drift region resistance was modeled according to the physical characteristics and the specific structure of the trench-gate MOSFET device. For the accurate simulation of dynamic characteristics, three important capacitances, gate-to-drain capacitance Cgd, gate-to-source capacitance Cgsand drain-to-source capacitance Cds, were modeled, respectively, in the proposed model. Furthermore,the self-heating effect, temperature effect and breakdown characteristic were taken into account; the self-heating model and breakdown model were built in the proposed model; and the temperature parameters of the model were revised. The proposed model is verified by experimental results, and the errors between measured data and simulation results of the novel model are less than 5%. Therefore, the model can give an accurate description for both the static and dynamic characteristics of the trench-gate MOSFET device.

A Nonlinear Observer Approach of SOC Estimation Based on Hysteresis Model for Lithium-ion Battery

In this paper, a state of charge U+0028 SOC U+0029 estimation approach for lithium-ion battery based on equivalent circuit model and the input-to-state stability U+0028 ISS U+0029 theory has been proposed. According to the electrochemical performance of lithiumion battery, the equivalent circuit model with two RC networks is established, which includes hysteresis characteristic in inner electrochemical response process. The nonlinear relation between open circuit voltage U+0028 OCV U+0029 and SOC is obtained from a rapid test. Exponential fitting method is used to identify the parameters of the model. A novel state observer based on ISS theory is designed for lithium-ion battery SOC estimation. The designed observer is tested on AMESim and Simulink co-simulation. The simulation results show that the proposed method has a high SOC estimation accuracy with an error of about 2 percent. © 2017 Chinese Association of Automation.

The Switching Fractional Order Chaotic System and Its Application to Image Encryption

Many studies on fractional order chaotic systems and secure communications have been carried out, however, switching fractional order chaotic system and its application to image encryption have not been explored yet. In this paper, a new switching fractional order chaotic system is proposed, containing fractional order Chen system and the other two fractional order chaotic systems. Chaotic attractors and dynamical analysis including Lyapunov exponent, bifurcation diagram, fractal dimension, dissipation, stability and symmetry are shown firstly. After that, some circuit simulations through Multisim are presented. By controlling switch k U+2082 and k U+2083, switching among the three fractional order chaotic subsystems can be realized. Finally, we apply the switching fractional order chaotic system to image encryption using exclusive or U+0028 XOR U+0029 encryption algorithm. The encryption scheme could increase randomness and improve speed of encryption. © 2017 Chinese Association of Automation.

基于表面势的增强型p-GaN HEMT器件模型

为了满足功率电路及系统设计对p-GaN HEMT(High Electron Mobility Transistor)器件模型的需求,本文建立了一套基于表面势计算方法的增强型p-GaN HEMT器件SPICE(Simulation Program with Integrated Circuit Emphasis)模型.根据耗尽型GaN HEMT器件和增强型p-GaN HEMT器件结构的对比,推导出p-GaN栅结构电压解析公式.考虑到p-GaN栅掺杂效应和物理机理,推导出栅电容和栅电流解析公式.同时,与基于表面势的高电子迁移率晶体管高级SPICE模型内核相结合,建立完整的增强型p-GaN HEMT功率器件的SPICE模型.将所建立的SPICE模型与实测结果进行对比验证.结果表明,所建立的模型准确实现了包括转移特性、输出特性、栅电容以及栅电流在内的p-GaN HEMT器件的电学特性.模型仿真数据与实测数据拟合度误差均小于5%.本文所提出的增强型p-GaN HEMT器件模型在进行电路设计时具有重要的应用价值.

Implementation of a novel two-attractor grid multi-scroll chaotic system

This paper proposed a method of generating two attractors in a novel grid multi-scroll chaotic system. Based on a newly generated three-dimensional system, a two-attractor grid multi-scroll attractor system can be generated by adding two triangular waves and a sign function. Some basic dynamical properties, such as equilibrium points, bifurcations, and phase diagrams, were studied. Furthermore, the system was experimentally confirmed by an electronic circuit. The circuit simulation results and numerical simulation results verified the feasibility of this method.

全绝缘自支撑电缆系统设计(英文)

All-dielectric self-supporting(ADSS) cables are installed along with transmission line for the purpose of communication.During installation the outer layer of the cable is hydrophobic and is not prone to dry band arcing. These cables become less hydrophobic over time and become vulnerable to dry band arcing.This loss in hydrophobicity is because of the contamination formed on the outer layer due to pollution.This is one of the reasons which cause cable failure.Considerable amount of losses will be incurred on the occurrence of a cable failure as the cables are also leased to other companies.An improved equivalent circuit is used to calculate the voltage and current distribution of the double circuit line.A three-phase single circuit line and a three-phase double circuit line are used to calculate their corresponding voltage distribution and current distribution.The results could be used to predict dry band arcing on similar models.The method used considers sag,span and pollution on ADSS cable.

The influences of model parameters on the characteristics of memristors

As the fourth passive circuit component, a memristor is a nonlinear resistor that can ＂remember＂ the amount of charge passing through it. The characteristic of ＂remembering＂ the charge and non-volatility makes memristors great potential candidates in many fields. Nowadays, only a few groups have the ability to fabricate memristors, and most researchers study them by theoretic analysis and simulation. In this paper, we first analyse the theoretical base and characteristics of memristors, then use a simulation program with integrated circuit emphasis as our tool to simulate the theoretical model of memristors and change the parameters in the model to see the influence of each parameter on the characteristics. Our work supplies researchers engaged in memristor-based circuits with advice on how to choose the proper parameters.

SIMULATION IN THERMAL DESIGN FOR ELECTRONIC CONTROL UNIT OF ELECTRONIC UNIT PUMP

The high working junction temperature of power component is the most common reason of its failure. So the thermal design is of vital importance in electronic control unit （ECU） design. By means of circuit simulation, the thermal design of ECU for electronic unit pump （EUP） fuel system is applied. The power dissipation model of each power component in the ECU is created and simulated. According to the analyses of simulation results, the factors which affect the power dissipation of components are analyzed. Then the ways for reducing the power dissipation of power components are carried out. The power dissipation of power components at different engine state is calculated and analyzed. The maximal power dissipation of each power component in all possible engine state is also carried out based on these simulations. A cooling system is designed based on these studies. The tests show that the maximum total power dissipation of ECU drops from 43.2 W to 33.84 W after these simulations and optimizations. These applications of simulations in thermal design of ECU can greatly increase the quality of the design, save the design cost and shorten design time