In active semiconductor devices, the junction characteristics are critical for the electrical performance. As an alternative of the atomic force microscopy (AFM)-based electrical techniques which provide unique juncti...In active semiconductor devices, the junction characteristics are critical for the electrical performance. As an alternative of the atomic force microscopy (AFM)-based electrical techniques which provide unique junction characterization, other methods are dedicated for the delineation of the electrical junction such as the wet chemical etching, the electrochemical plating method, the Seebeck effect imaging (SEI) method, the electron-beam induced current (EBIC) technique and the secondary electron potential contrast (SEPC) method. The aim of this paper is in the one hand to compare these five techniques in term of sample preparation, spatial application range, spatial resolution, simplicity and information displayed. In the other hand, this review aims to provide some guidelines for the appropriate delineation method(s) selection. It was confirmed that chemical based techniques are the simplest junction delineation methods but exhibit some drawbacks in term of spatial resolution and reproducibility. Despite of a limited spatial resolution, it was evidenced that EBIC can provide accurate electrical characterization of the junction. Finally, it was demonstrated that SEPC is the most promising technique providing the higher spatial resolution. The effect of the sample preparation method has been described. Even if the comparison was mainly based on homo-micro-Silicon junctions (n-p and n-p-n-p), the results were also discussed for short SiC junctions. The importance of the analysis context was considered in this paper and analysis flow was suggested for specific analysis cases.展开更多
Nanowires require surface passivation due to their inherent large surface to volume ratio. We investigate the effect of embedding InP nanowires in different oxides with respect to surface passivation by use of electro...Nanowires require surface passivation due to their inherent large surface to volume ratio. We investigate the effect of embedding InP nanowires in different oxides with respect to surface passivation by use of electron beam induced current measurements enabled by a nanoprobe based system inside a scanning electron microscope. The measurements reveal remote doping due to fixed charge carriers in the passivating PO_(x)/Al_(2)O_(3) shell in contrast to results using SiO_(x). We used time-resolved photoluminescence to characterize the lifetime of charge carriers to evaluate the success of surface passivation. In addition, spatially resolved internal quantum efficiency simulations support and correlate the two applied techniques. We find that atomic-layer deposited PO_(x)/Al_(2)O_(3) has the potential to passivate the surface of InP nanowires, but at the cost of inducing a field-effect on the nanowires, altering their electrostatic potential profile. The results show the importance of using complementary techniques to correctly evaluate and interpret processing related effects for optimization of nanowire-based optoelectronic devices.展开更多
文摘In active semiconductor devices, the junction characteristics are critical for the electrical performance. As an alternative of the atomic force microscopy (AFM)-based electrical techniques which provide unique junction characterization, other methods are dedicated for the delineation of the electrical junction such as the wet chemical etching, the electrochemical plating method, the Seebeck effect imaging (SEI) method, the electron-beam induced current (EBIC) technique and the secondary electron potential contrast (SEPC) method. The aim of this paper is in the one hand to compare these five techniques in term of sample preparation, spatial application range, spatial resolution, simplicity and information displayed. In the other hand, this review aims to provide some guidelines for the appropriate delineation method(s) selection. It was confirmed that chemical based techniques are the simplest junction delineation methods but exhibit some drawbacks in term of spatial resolution and reproducibility. Despite of a limited spatial resolution, it was evidenced that EBIC can provide accurate electrical characterization of the junction. Finally, it was demonstrated that SEPC is the most promising technique providing the higher spatial resolution. The effect of the sample preparation method has been described. Even if the comparison was mainly based on homo-micro-Silicon junctions (n-p and n-p-n-p), the results were also discussed for short SiC junctions. The importance of the analysis context was considered in this paper and analysis flow was suggested for specific analysis cases.
文摘Nanowires require surface passivation due to their inherent large surface to volume ratio. We investigate the effect of embedding InP nanowires in different oxides with respect to surface passivation by use of electron beam induced current measurements enabled by a nanoprobe based system inside a scanning electron microscope. The measurements reveal remote doping due to fixed charge carriers in the passivating PO_(x)/Al_(2)O_(3) shell in contrast to results using SiO_(x). We used time-resolved photoluminescence to characterize the lifetime of charge carriers to evaluate the success of surface passivation. In addition, spatially resolved internal quantum efficiency simulations support and correlate the two applied techniques. We find that atomic-layer deposited PO_(x)/Al_(2)O_(3) has the potential to passivate the surface of InP nanowires, but at the cost of inducing a field-effect on the nanowires, altering their electrostatic potential profile. The results show the importance of using complementary techniques to correctly evaluate and interpret processing related effects for optimization of nanowire-based optoelectronic devices.
