Application of digital driving circuit in arc welding power source based on HCPL-316J

The digitalization of arc welding power source mainly depends on the digitalization of arc welding inverter,so that main circuit and controlling system can give full play to advantages.Digital switching control makes main circuit digital and DSP and/or MCU makes controlling system,digital.So IGBT driving circuit,as a tie of main circuit and controlling system,should also be got digitalized.Thus,a digital driving circuit based on optocoupler device HCPL-316 J is provided.Some testing experiments were done.After driving testing,the driving circuit certificates that driving waveforms satisfy the requirements of arc welding power source and the driving circuit is reasonably and simply designed.And the driving circuit has high controlling precision and reliability.No-load-voltage testing and welding external characteristic testing prove that the driving circuit can be applied in arc welding power source.

Design of a 16 gray scales 320×240 pixels OLED-on-silicon driving circuit

A 320×240 pixel organic-light-emitfing-diode-on-silicon （OLEDoS） driving circuit is implemented using the standard 0.5μm CMOS process of CSMC. It gives 16 gray scales with integrated 4 bit D/A converters. A three- transistor voltage-programmed OLED pixel driver is proposed, which can realize the very small current driving required for the OLEDoS microdisplay. Both the D/A converter and the pixel driver are implemented with pMOS devices. The pass-transistor and capacitance in the OLED pixel driver can be used to sample the output of the D/A converter. An additional pMOS is added to OLED pixel driver, which is used to control the D/A converter operating only when one row is on. This can reduce the circuit＇s power consumption. This driving circuit can work properly in a frame frequency of 50 Hz, and the final layout of this circuit is given. The pixel area is 28.4 × 28.4μm^2 and the display area is 10.7 × 8.0 mm^2 （the diagonal is about 13 mm）. The measured pixel gray scale voltage shows that the function of the driver circuit is correct, and the power consumption of the chip is about 350 mW.

A universal programmable driving circuit for spatial light modulators

A universal programmable multi-quantum-well（MQW） spatial light modulator（SLM） driving circuit is developed.With a twice scanning, it can generate programmable signals to drive a non-linear MQW SLM by using a software preprocessing unit.By adjusting the switching network of the driving circuit, this circuit can reduce the switching noise and improve the output precision.The chip test results show that the driving voltage can swing from 0 to VDD, and its resolution could be close to 256 with a pixel area of only 65 × 65 μm2.

Driving circuit with high accuracy and large driving capability for high voltage buck regulators

This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.

A low-power high-speed driving circuit for spatial light modulators

This paper describes the design and test of a novel custom driving circuit for multi-quantum-well （MQW） spatial light modulators（SLMs）.Unlike previous solutions,we integrated all blocks in one chip to synchronize the control logic circuit and the driving circuits.Single-slope digital-to-analog converters（DACs） inside each pixel are not adopted because it is difficult to eliminate capacitor mismatch.64 column-shared 8-bit resistor-string DACs are utilized to provide programmable output voltages from 0.5 to 3.8 V.They are located on the top of 64×64 driving pixels tightly to match each other with several dummies.Each DAC performs its conversion in 280 ns and draws 80μA.For a high speed data transfer rate,the system adopts a 2-stage shift register that operates at 50 MHz and the modulating rate achieves 50 K frames/s while dissipating 302 mW from a 5-V supply.The die is fabricated in a 0.35 /μm CMOS process and its area is 5.5 x 7 mm^2.

An integrated driving circuit implemented with p-type LTPS TFTs for AMOLED

Based on the technology of low temperature poly silicon thin film transistors (poly-Si-TFTs), a novel p-type TFT AMOLED panel with self-scanned driving circuit is introduced in this paper. A shift register formed with novel p-type TFTs is pro- posed to realize the gate driver. A flip-latch cooperated with the shift register is designed to conduct the data writing. In order to verify the validity of the proposed design, the circuits are simulated with SILVACO TCAD tools, using the MODEL in which the parameters of LTPS TFTs were extracted from the LTPS TFTs made in our lab. The simulation results indicate that the circuit can fulfill the driving function.

Research on Switching Characteristics Based on Optimization Design of SiC MOSFET Drive Circuit

With the increasing emphasis on energy conservation,emission reduction and environmental protection,the application prospect of SiC power devices is becoming more and more broad.In the high frequency application of SiC MOSFET,the change rate of voltage and current in the turn-on and turn-off process increases with the increase of switching frequency.Also,the current and voltage spike oscillation phenomenon is gradually intensified due to the influence of circuit stray parameters.Based on the analysis of SiC MOSFET characteristics,the paper discusses the design requirements and design principles of SiC MOSFET drive circuit.Then,taking the SiC module C2M0080120D of Cree Company as an example,a driver circuit design is realized through the ACPL-355JC optocoupler driver module of Broadcom Company.The circuit not only has the characteristics of fast transmission delay and excellent performance,but also has the functions of overload and short circuit protection.The driving circuit is verified by LTspice simulation software,and the switching characteristics of SiC MOSFET under different working conditions are studied in depth.The experimental results show that the driving circuit can improve the switching time of SiC MOSFET and effectively solve the problem of current and voltage spike oscillation,which lays a foundation for the practical application of SiC MOSFET in the future.

A novel 300 kW arc plasma inverter system based on hierarchical controlled building block structure

To date, the high power arc plasma technology is widely used. A next generation high power arc plasma system based on building block structure is presented. The whole arc plasma inverter system is composed of 12 paralleled units to increase the system output capability. The hierarchical control system is adopted to improve the reliability and flexibility of the high power arc plasma inverter. To ensure the reliable turn on and off of the IGBT module in each building block unit, a special pulse drive circuit is designed by using pulse transformer. The experimental result indicates that the high power arc plasma inverter system can transfer 300 kW arc plasma energy reliably with high efficiency.

A novel charge pump drive circuit for power MOSFETs

Novel improved power metal oxide semiconductor field effect transistor （MOSFET） drive circuits are introduced. An anti-deadlock block is used in the P-channel power MOSFET drive circuit to avoid deadlocks and improve the transient response. An additional charging path is added to the N-channel power MOSFET drive circuit to enhance its drive capability and improve the transient response. The entire circuit is designed in a 0.6μm BCD process and simulated with Cadence Spectre. Compared with traditional power MOSFET drive circuits, the simulation results show that improved P-channel power MOSFET drive circuit makes the rise time reduced from 60 to 14 ns, the fall time reduced from 240 to 30 ns, and its power dissipation reduced from 2 to 1 mW, while the improved N-channel power MOSFET drive circuit makes the rise time reduced from 360 to 27 ns and its power dissipation reduced from 1.1 to 0.8 mW.

A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step

A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.