The evolution of inter-device leakage generation technologies is studied with an N-type current with total ionizing dose in transistors in 180 nm poly-gate field device （PFD） that uses the shallow trench isolation a...The evolution of inter-device leakage generation technologies is studied with an N-type current with total ionizing dose in transistors in 180 nm poly-gate field device （PFD） that uses the shallow trench isolation as an effective gate oxide. The overall radiation response of these structures is determined by the trapped charge in the oxide. The impacts of different bias conditions during irradiation on the inter-device leakage current are studied for the first time in this work, which demonstrates that the worst condition is the same as traditional NMOS transistors. Moreover simulation is used to understand the bias dependence the two-dimensional technology computer-aided design展开更多
This work presents a self-consistent two-dimensional(2-D) simulation method with unified physical models for different operation regimes of charge trapping memory. The simulation carefully takes into consideration the...This work presents a self-consistent two-dimensional(2-D) simulation method with unified physical models for different operation regimes of charge trapping memory. The simulation carefully takes into consideration the tunneling process, charge trapping/de-trapping mechanisms, and 2-D drift-diffusion transport within the storage layer. A string of three memory cells has been simulated and evaluated for different gate stack compositions and temperatures. The simulator is able to describe the charge transport behavior along bitline and tunneling directions under different operations. Good agreement has been made with experimental data,which hence validates the implemented physical models and altogether confirms the simulation as a valuable tool for evaluating the characteristics of three-dimensional NAND flash memory.展开更多
文摘The evolution of inter-device leakage generation technologies is studied with an N-type current with total ionizing dose in transistors in 180 nm poly-gate field device （PFD） that uses the shallow trench isolation as an effective gate oxide. The overall radiation response of these structures is determined by the trapped charge in the oxide. The impacts of different bias conditions during irradiation on the inter-device leakage current are studied for the first time in this work, which demonstrates that the worst condition is the same as traditional NMOS transistors. Moreover simulation is used to understand the bias dependence the two-dimensional technology computer-aided design
基金supported by National Natural Science Foundation of China (Grant No. 91230107)National Basic Research Program of China (973) (Grant No. 2013CBA01604)National High Technology Research and Development Program of China (863) (Grant No. 2015AA016501)
文摘This work presents a self-consistent two-dimensional(2-D) simulation method with unified physical models for different operation regimes of charge trapping memory. The simulation carefully takes into consideration the tunneling process, charge trapping/de-trapping mechanisms, and 2-D drift-diffusion transport within the storage layer. A string of three memory cells has been simulated and evaluated for different gate stack compositions and temperatures. The simulator is able to describe the charge transport behavior along bitline and tunneling directions under different operations. Good agreement has been made with experimental data,which hence validates the implemented physical models and altogether confirms the simulation as a valuable tool for evaluating the characteristics of three-dimensional NAND flash memory.
